From: Yufeng Zhang <yufeng.zhang@arm.com>
Date: Thu, 27 Jun 2013 12:30:11 +0000 (+0000)
Subject: aarch64.c (aarch64_add_offset): Change to pass 'mode' to aarch64_plus_immediate and... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9c023bf0bdfdcf26de6013f2a3692ac32511aa3e;p=gcc.git

aarch64.c (aarch64_add_offset): Change to pass 'mode' to aarch64_plus_immediate and gen_rtx_PLUS.

gcc/

	* config/aarch64/aarch64.c (aarch64_add_offset): Change to pass
	'mode' to aarch64_plus_immediate and gen_rtx_PLUS.

From-SVN: r200466
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d1d1113bfc5..5398537904e 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2013-06-27  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+	* config/aarch64/aarch64.c (aarch64_add_offset): Change to pass
+	'mode' to aarch64_plus_immediate and gen_rtx_PLUS.
+
 2013-06-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 
 	* config/s390/s390.c: Rename UNSPEC_CCU_TO_INT to
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 527b00dbcaa..81c6fd9f57d 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -804,7 +804,7 @@ aarch64_force_temporary (rtx x, rtx value)
 static rtx
 aarch64_add_offset (enum machine_mode mode, rtx temp, rtx reg, HOST_WIDE_INT offset)
 {
-  if (!aarch64_plus_immediate (GEN_INT (offset), DImode))
+  if (!aarch64_plus_immediate (GEN_INT (offset), mode))
     {
       rtx high;
       /* Load the full offset into a register.  This
@@ -812,7 +812,7 @@ aarch64_add_offset (enum machine_mode mode, rtx temp, rtx reg, HOST_WIDE_INT off
       high = GEN_INT (offset);
       offset = 0;
       high = aarch64_force_temporary (temp, high);
-      reg = aarch64_force_temporary (temp, gen_rtx_PLUS (Pmode, high, reg));
+      reg = aarch64_force_temporary (temp, gen_rtx_PLUS (mode, high, reg));
     }
   return plus_constant (mode, reg, offset);
 }