From: Doug Rupp <rupp@adacore.com>
Date: Tue, 22 May 2018 13:21:37 +0000 (+0000)
Subject: [Ada] Align stack to 128bits on VxWorks for AArch64
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9c629d61f03d15608ed6b7d3250dbba5f72293eb;p=gcc.git

[Ada] Align stack to 128bits on VxWorks for AArch64

Real board requires fat alignment of stack.

2018-05-22  Doug Rupp  <rupp@adacore.com>

gcc/ada/

	* sigtramp-vxworks-target.inc: Align stack to 128bits on AArch64.

From-SVN: r260513
---

diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog
index c8e4d4d9bab..707ca720d6a 100644
--- a/gcc/ada/ChangeLog
+++ b/gcc/ada/ChangeLog
@@ -1,3 +1,7 @@
+2018-05-22  Doug Rupp  <rupp@adacore.com>
+
+	* sigtramp-vxworks-target.inc: Align stack to 128bits on AArch64.
+
 2018-05-22  Jerome Lambourg  <lambourg@adacore.com>
 
 	* sigtramp-qnx.c: Fix stack alignment issue in the signal trampoline.
diff --git a/gcc/ada/sigtramp-vxworks-target.inc b/gcc/ada/sigtramp-vxworks-target.inc
index f8648f1b19e..1c3ed569c92 100644
--- a/gcc/ada/sigtramp-vxworks-target.inc
+++ b/gcc/ada/sigtramp-vxworks-target.inc
@@ -417,17 +417,18 @@ TCR(".cfi_return_column " S(REGNO_PC_OFFSET))
 #ifdef __aarch64__
 #define SIGTRAMP_BODY \
 CR("") \
-TCR("# Push FP and LR on stack") \
-TCR("stp x29, x30, [sp, #-16]!") \
-TCR("# Push register used to hold the CFA on stack (pro forma)") \
-TCR("str x" S(CFA_REG) ", [sp, #-8]!")  \
+TCR("# Allocate the frame (16bytes aligned) and push FP and LR") \
+TCR("stp x29, x30, [sp, #-32]!") \
+TCR("add x29, sp, 0") \
+TCR("# Store register used to hold the CFA on stack (pro forma)") \
+TCR("str x" S(CFA_REG) ", [sp, 16]")  \
 TCR("# Set the CFA reg from the 5th arg") \
 TCR("mov x" S(CFA_REG) ", x4") \
 TCR("# Call the handler") \
 TCR("blr x3") \
 TCR("# Release our frame and return (should never get here!).") \
-TCR("ldr x" S(CFA_REG) " , [sp], 8") \
-TCR("ldp x29, x30, [sp], 16") \
+TCR("ldr x" S(CFA_REG) ", [sp, 16]") \
+TCR("ldp x29, x30, [sp], 32") \
 TCR("ret")
 #else
 #define SIGTRAMP_BODY \