From: Bin Cheng <bin.cheng@arm.com>
Date: Wed, 10 Aug 2016 15:45:25 +0000 (+0000)
Subject: target-supports.exp (check_effective_target_vect_cond_mixed): Add aarch64*-*-*.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9c8eabea69ccbde8b86d7238d63d136277208a05;p=gcc.git

target-supports.exp (check_effective_target_vect_cond_mixed): Add aarch64*-*-*.

	gcc/testsuite
	* lib/target-supports.exp (check_effective_target_vect_cond_mixed):
	Add aarch64*-*-*.

From-SVN: r239329
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 9249cc4f100..2b3eb821999 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-08-10  Bin Cheng  <bin.cheng@arm.com>
+
+	* lib/target-supports.exp (check_effective_target_vect_cond_mixed):
+	Add aarch64*-*-*.
+
 2016-08-10  Bin Cheng  <bin.cheng@arm.com>
 
 	* gcc.target/aarch64/simd/vcond-ne.c: New test.
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 9c5194d0d9a..fc386b62f2a 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -5402,6 +5402,7 @@ proc check_effective_target_vect_cond_mixed { } {
     } else {
 	set et_vect_cond_mixed_saved($et_index) 0
 	if { [istarget i?86-*-*] || [istarget x86_64-*-*]
+	     || [istarget aarch64*-*-*]
 	     || [istarget powerpc*-*-*] } {
 	   set et_vect_cond_mixed_saved($et_index) 1
 	}