From: Luke Kenneth Casson Leighton Date: Wed, 19 Aug 2020 04:44:20 +0000 (+0100) Subject: 1 extra bit on mask shift size needed, to allow ">" to work X-Git-Tag: 24jan2021_ls180~27 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9cac606760b0fb8ea0ec89cc05aa1f4d5231a829;p=nmutil.git 1 extra bit on mask shift size needed, to allow ">" to work --- diff --git a/src/nmutil/mask.py b/src/nmutil/mask.py index a75d7e3..2237522 100644 --- a/src/nmutil/mask.py +++ b/src/nmutil/mask.py @@ -5,7 +5,7 @@ from nmigen.utils import log2_int class Mask(Elaboratable): def __init__(self, sz): self.sz = sz - self.shift = Signal(log2_int(sz, False)) + self.shift = Signal(log2_int(sz, False)+1) self.mask = Signal(sz) def elaborate(self, platform):