From: Jacob Lifshay <programmerjake@gmail.com>
Date: Wed, 24 May 2023 03:10:18 +0000 (-0700)
Subject: ISACaller: generate FP trap
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9cba039630724ae73cbe90ec611f1538e4ed2ce1;p=openpower-isa.git

ISACaller: generate FP trap
---

diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py
index 263608c3..714f274a 100644
--- a/src/openpower/decoder/isa/caller.py
+++ b/src/openpower/decoder/isa/caller.py
@@ -2200,6 +2200,10 @@ class ISACaller(ISACallerHelper, ISAFPHelpers, StepLoop):
             chk = rc_en or is_cr
             ffirst_hit = (yield from self.check_ffirst(info, chk, srcstep))
 
+        if self.FPSCR.FEX and (self.msr[MSRb.FE0] or self.msr[MSRb.FE1]):
+            self.call_trap(0x700, PIb.FP)
+            return
+
         # any modified return results?
         yield from self.do_outregs_nia(asmop, ins_name, info, outs,
                                        carry_en, rc_en, ffirst_hit, ew_dst)