From: whitequark <whitequark@whitequark.org>
Date: Wed, 19 Feb 2020 01:21:00 +0000 (+0000)
Subject: back.pysim: fix RHS codegen for Cat() and Repl(..., 0).
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9d274a0826b0bc6941d7dc70c6bfe3e9e332887a;p=nmigen.git

back.pysim: fix RHS codegen for Cat() and Repl(..., 0).

Fixes #325.
---

diff --git a/nmigen/back/pysim.py b/nmigen/back/pysim.py
index 7ddbde2..5d599a3 100644
--- a/nmigen/back/pysim.py
+++ b/nmigen/back/pysim.py
@@ -492,7 +492,9 @@ class _RHSValueCompiler(_ValueCompiler):
             part_mask = (1 << len(part)) - 1
             gen_parts.append(f"(({self(part)} & {part_mask}) << {offset})")
             offset += len(part)
-        return f"({' | '.join(gen_parts)})"
+        if gen_parts:
+            return f"({' | '.join(gen_parts)})"
+        return f"0"
 
     def on_Repl(self, value):
         part_mask = (1 << len(value.value)) - 1
@@ -502,7 +504,9 @@ class _RHSValueCompiler(_ValueCompiler):
         for _ in range(value.count):
             gen_parts.append(f"({gen_part} << {offset})")
             offset += len(value.value)
-        return f"({' | '.join(gen_parts)})"
+        if gen_parts:
+            return f"({' | '.join(gen_parts)})"
+        return f"0"
 
     def on_ArrayProxy(self, value):
         index_mask = (1 << len(value.index)) - 1
diff --git a/nmigen/test/test_sim.py b/nmigen/test/test_sim.py
index 932d0f9..d3585a4 100644
--- a/nmigen/test/test_sim.py
+++ b/nmigen/test/test_sim.py
@@ -712,3 +712,15 @@ class SimulatorIntegrationTestCase(FHDLTestCase):
             with sim.write_vcd(open(os.path.devnull, "wt")):
                 with sim.write_vcd(open(os.path.devnull, "wt")):
                     pass
+
+
+class SimulatorRegressionTestCase(FHDLTestCase):
+    def test_bug_325(self):
+        dut = Module()
+        dut.d.comb += Signal().eq(Cat())
+        Simulator(dut).run()
+
+    def test_bug_325_bis(self):
+        dut = Module()
+        dut.d.comb += Signal().eq(Repl(Const(1), 0))
+        Simulator(dut).run()