From: Sebastien Bourdeauducq Date: Tue, 19 Nov 2013 22:15:42 +0000 (+0100) Subject: platforms/mixxeo: update DVI input timing constraints X-Git-Tag: 24jan2021_ls180~2099^2~443^2 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9d5931c969810a236de2a2713cfd5e509839d097;p=litex.git platforms/mixxeo: update DVI input timing constraints --- diff --git a/mibuild/platforms/mixxeo.py b/mibuild/platforms/mixxeo.py index c797b09e..12b242fb 100644 --- a/mibuild/platforms/mixxeo.py +++ b/mibuild/platforms/mixxeo.py @@ -185,7 +185,7 @@ TIMESPEC "TSphy_rx_clk_io" = FROM "PADS" TO "GRPphy_rx_clk" 10 ns; try: self.add_platform_command(""" NET "{dviclk}" TNM_NET = "GRP"""+si+""""; -TIMESPEC "TS"""+si+"""" = PERIOD "GRP"""+si+"""" 26.7 ns HIGH 50%; +TIMESPEC "TS"""+si+"""" = PERIOD "GRP"""+si+"""" 12.00 ns HIGH 50%; """, dviclk=self.lookup_request("dvi_in", i).clk_p) except ConstraintError: pass