From: Marek Olšák <marek.olsak@amd.com>
Date: Mon, 9 May 2016 11:36:39 +0000 (+0200)
Subject: gallium/util: add util_texrange_covers_whole_level from radeon
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9d881cc0ac8f08f839dd86f6aeaf6c7bca97ccb1;p=mesa.git

gallium/util: add util_texrange_covers_whole_level from radeon

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
---

diff --git a/src/gallium/auxiliary/util/u_inlines.h b/src/gallium/auxiliary/util/u_inlines.h
index a38223ca33c..90821b29de2 100644
--- a/src/gallium/auxiliary/util/u_inlines.h
+++ b/src/gallium/auxiliary/util/u_inlines.h
@@ -650,6 +650,18 @@ util_max_layer(const struct pipe_resource *r, unsigned level)
    }
 }
 
+static inline bool
+util_texrange_covers_whole_level(const struct pipe_resource *tex,
+                                 unsigned level, unsigned x, unsigned y,
+                                 unsigned z, unsigned width,
+                                 unsigned height, unsigned depth)
+{
+   return x == 0 && y == 0 && z == 0 &&
+          width == u_minify(tex->width0, level) &&
+          height == u_minify(tex->height0, level) &&
+          depth == util_max_layer(tex, level) + 1;
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index e2955aa8956..db63bebc676 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -38,17 +38,6 @@ static void r600_texture_discard_cmask(struct r600_common_screen *rscreen,
 				       struct r600_texture *rtex);
 
 
-static bool range_covers_whole_texture(struct pipe_resource *tex,
-				       unsigned level, unsigned x, unsigned y,
-				       unsigned z, unsigned width,
-				       unsigned height, unsigned depth)
-{
-	return x == 0 && y == 0 && z == 0 &&
-	       width == u_minify(tex->width0, level) &&
-	       height == u_minify(tex->height0, level) &&
-	       depth == util_max_layer(tex, level) + 1;
-}
-
 bool r600_prepare_for_dma_blit(struct r600_common_context *rctx,
 			       struct r600_texture *rdst,
 			       unsigned dst_level, unsigned dstx,
@@ -87,9 +76,9 @@ bool r600_prepare_for_dma_blit(struct r600_common_context *rctx,
 	if (rdst->dcc_offset) {
 		/* We can't discard DCC if the texture has been exported. */
 		if (rdst->resource.is_shared ||
-		    !range_covers_whole_texture(&rdst->resource.b.b, dst_level,
-						dstx, dsty, dstz, src_box->width,
-						src_box->height, src_box->depth))
+		    !util_texrange_covers_whole_level(&rdst->resource.b.b, dst_level,
+						      dstx, dsty, dstz, src_box->width,
+						      src_box->height, src_box->depth))
 			return false;
 
 		r600_texture_discard_dcc(rctx->screen, rdst);
@@ -101,9 +90,9 @@ bool r600_prepare_for_dma_blit(struct r600_common_context *rctx,
 	 *        SDMA. Otherwise, use the 3D path.
 	 */
 	if (rdst->cmask.size && rdst->dirty_level_mask & (1 << dst_level)) {
-		if (!range_covers_whole_texture(&rdst->resource.b.b, dst_level,
-						dstx, dsty, dstz, src_box->width,
-						src_box->height, src_box->depth))
+		if (!util_texrange_covers_whole_level(&rdst->resource.b.b, dst_level,
+						      dstx, dsty, dstz, src_box->width,
+						      src_box->height, src_box->depth))
 			return false;
 
 		r600_texture_discard_cmask(rctx->screen, rdst);