From: Jakub Jelinek Date: Thu, 19 Jan 2017 15:41:15 +0000 (+0100) Subject: re PR target/79127 (Error: invalid register for .seh_savexmm in matmul_i4.c) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9db0a8c2bfe8e9602109d3fc3de0dc5e575b8c5c;p=gcc.git re PR target/79127 (Error: invalid register for .seh_savexmm in matmul_i4.c) PR target/79127 * acinclude.m4 (LIBGFOR_CHECK_AVX512F): Ensure the test clobbers some zmm16+ registers to verify they are handled by unwind info properly if needed. * configure: Regenerated. From-SVN: r244636 --- diff --git a/libgfortran/ChangeLog b/libgfortran/ChangeLog index 3335177eebe..6d252be9186 100644 --- a/libgfortran/ChangeLog +++ b/libgfortran/ChangeLog @@ -1,3 +1,11 @@ +2017-01-19 Jakub Jelinek + + PR target/79127 + * acinclude.m4 (LIBGFOR_CHECK_AVX512F): Ensure the test clobbers + some zmm16+ registers to verify they are handled by unwind info + properly if needed. + * configure: Regenerated. + 2017-01-17 Jakub Jelinek PR other/79046 diff --git a/libgfortran/acinclude.m4 b/libgfortran/acinclude.m4 index 9a7f461af3c..34e14071aeb 100644 --- a/libgfortran/acinclude.m4 +++ b/libgfortran/acinclude.m4 @@ -437,7 +437,14 @@ AC_DEFUN([LIBGFOR_CHECK_AVX512F], [ typedef double __m512d __attribute__ ((__vector_size__ (64))); __m512d _mm512_add (__m512d a) { - return __builtin_ia32_addpd512_mask (a, a, a, 1, 4); + __m512d b = __builtin_ia32_addpd512_mask (a, a, a, 1, 4); + /* For -m64/-mx32 also verify that code will work even if + the target uses call saved zmm16+ and needs to emit + unwind info for them (e.g. on mingw). See PR79127. */ +#ifdef __x86_64__ + asm volatile ("" : : : "zmm16", "zmm17", "zmm18", "zmm19"); +#endif + return b; }]], [[]])], AC_DEFINE(HAVE_AVX512F, 1, [Define if AVX512f instructions can be compiled.]), diff --git a/libgfortran/configure b/libgfortran/configure index f975e2abc50..20b5e681712 100755 --- a/libgfortran/configure +++ b/libgfortran/configure @@ -26300,7 +26300,14 @@ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext typedef double __m512d __attribute__ ((__vector_size__ (64))); __m512d _mm512_add (__m512d a) { - return __builtin_ia32_addpd512_mask (a, a, a, 1, 4); + __m512d b = __builtin_ia32_addpd512_mask (a, a, a, 1, 4); + /* For -m64/-mx32 also verify that code will work even if + the target uses call saved zmm16+ and needs to emit + unwind info for them (e.g. on mingw). See PR79127. */ +#ifdef __x86_64__ + asm volatile ("" : : : "zmm16", "zmm17", "zmm18", "zmm19"); +#endif + return b; } int main ()