From: Luke Kenneth Casson Leighton Date: Sat, 1 Jun 2019 14:28:12 +0000 (+0100) Subject: addr release only on op_ldst X-Git-Tag: div_pipeline~1912 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9def6da56b1850879e553c7df7bf1bbd91134c3f;p=soc.git addr release only on op_ldst --- diff --git a/src/experiment/compldst.py b/src/experiment/compldst.py index f3bd86a3..d6f363e2 100644 --- a/src/experiment/compldst.py +++ b/src/experiment/compldst.py @@ -149,13 +149,15 @@ class LDSTCompUnit(Elaboratable): m.d.sync += sto_l.s.eq(self.go_ad_i) m.d.sync += sto_l.r.eq(reset_s) - # outputs + # outputs: busy and release signals busy_o = self.busy_o m.d.comb += self.busy_o.eq(opc_l.q) # busy out m.d.comb += self.rd_rel_o.eq(src_l.q & busy_o) # src1/src2 req rel - m.d.comb += self.adr_rel_o.eq(adr_l.q & ~op_ldst & busy_o) m.d.comb += self.sto_rel_o.eq(sto_l.q & busy_o & self.shadown_i) + # address release only happens on LD/ST, and is shadowed. + m.d.comb += self.adr_rel_o.eq(adr_l.q & op_ldst & busy_o & self.shadownn_i) + # request release enabled based on if op is a LD/ST or a plain ALU # if op is a LD/ST, req_rel activates from the *address* latch # if op is ADD/SUB, req_rel activates from the *dest* latch