From: Marek Olšák <maraeo@gmail.com>
Date: Sat, 6 Oct 2012 03:23:47 +0000 (+0200)
Subject: r600g: fix possible issue with stencil mipmap rendering
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9dfca930d7fcfda6767d3be9b1690d010f08fea5;p=mesa.git

r600g: fix possible issue with stencil mipmap rendering

Somehow I only hit this issue with my latest libdrm changes.
This won't be needed with DB texturing.

NOTE: This is a candidate for the 9.0 branch.
---

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index c126e7dfc3d..e35314f6c0e 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1496,13 +1496,24 @@ static void evergreen_init_depth_surface(struct r600_context *rctx,
 
 	if (rtex->surface.flags & RADEON_SURF_SBUFFER) {
 		uint64_t stencil_offset = rtex->surface.stencil_offset;
-		unsigned stile_split = rtex->surface.stencil_tile_split;
+		unsigned i, stile_split = rtex->surface.stencil_tile_split;
 
 		stile_split = eg_tile_split(stile_split);
 		stencil_offset += r600_resource_va(screen, surf->base.texture);
 		stencil_offset += rtex->surface.level[level].offset / 4;
 		stencil_offset >>= 8;
 
+		/* We're guessing the stencil offset from the depth offset.
+		 * Make sure each mipmap level has a unique offset. */
+		for (i = 1; i <= level; i++) {
+			/* If two levels have the same address, add 256
+			 * to the offset of the smaller level. */
+			if ((rtex->surface.level[i-1].offset / 4) >> 8 ==
+			    (rtex->surface.level[i].offset / 4) >> 8) {
+				stencil_offset++;
+			}
+		}
+
 		surf->db_stencil_base = stencil_offset;
 		surf->db_stencil_info = S_028044_FORMAT(V_028044_STENCIL_8) |
 					S_028044_TILE_SPLIT(stile_split);