From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 8 May 2021 00:43:43 +0000 (+0100)
Subject: add bugreport link to mmu
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9e0dd5f9da1dbe0d7a6a84b3cbd03bbaf2239c2e;p=soc.git

add bugreport link to mmu
---

diff --git a/src/soc/fu/mmu/fsm.py b/src/soc/fu/mmu/fsm.py
index e062ceb9..b3d09b4e 100644
--- a/src/soc/fu/mmu/fsm.py
+++ b/src/soc/fu/mmu/fsm.py
@@ -1,3 +1,9 @@
+"""
+Based on microwatt mmu.vhdl
+
+* https://bugs.libre-soc.org/show_bug.cgi?id=491
+"""
+
 from nmigen import Elaboratable, Module, Signal, Shape, unsigned, Cat, Mux
 from nmigen import Record, Memory
 from nmigen import Const