From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 23 Apr 2021 22:05:58 +0000 (+0100)
Subject: error in setting fast regs test values
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9e2b77f98363dae57e6a35d7d6ccbef1b6dd1b3a;p=soc.git

error in setting fast regs test values
---

diff --git a/src/soc/simple/test/test_core.py b/src/soc/simple/test/test_core.py
index e3c47eac..ff1ce52b 100644
--- a/src/soc/simple/test/test_core.py
+++ b/src/soc/simple/test/test_core.py
@@ -119,9 +119,13 @@ def setup_regs(pdecode2, core, test):
                     else:
                         yield from set_mmu_spr(sprname, i, val, core)
         else:
-            yield fregs.regs[fast].reg.eq(val)
             print("setting fast reg %d (%s) to %x" %
                   (fast, sprname, val))
+            if fregs.unary:
+                rval = core.regs.int.regs[fast].reg
+            else:
+                rval = core.regs.int.memory._array[fast]
+            yield rval.eq(val)
 
     # allow changes to settle before reporting on XER
     yield Settle()