From: lkcl <lkcl@web>
Date: Thu, 11 Feb 2021 01:12:35 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~215
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9e7f18a2367b5f3bd3cecd5d9bfee1aee30da3b6;p=libreriscv.git

---

diff --git a/openpower/sv/implementation.mdwn b/openpower/sv/implementation.mdwn
index 4fe8821b8..92c657ecb 100644
--- a/openpower/sv/implementation.mdwn
+++ b/openpower/sv/implementation.mdwn
@@ -70,9 +70,9 @@ order: listed in [[sv/overview]]
 
 An autogenerator containing CSV files is available so that the task of creating decoders is not burdensome.  sv_analyse.py creates the CSV files, SVP64RM class picks them up.
 
-* ISACaller: TODO
+* ISACaller: part done.  svp64 detected, PowerDecoder2 in use
 * power-gem5: TODO
-* TestIssuer: TODO
+* TestIssuer: TIDO
 * Microwatt: TODO
 * python-based assembler-translator: 40% done (lkcl)
 * c++ macros: underway (jacob)