From: Tom de Vries <tdevries@suse.de>
Date: Mon, 10 Aug 2020 13:42:38 +0000 (+0200)
Subject: [testsuite, nvptx] Add effective target sync_int_long_stack
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9eaf11417b6a017b21a5052a74be3d2a251cfb78;p=gcc.git

[testsuite, nvptx] Add effective target sync_int_long_stack

The nvptx target currently doesn't support effective target sync_int_long,
although it has support for 32-bit and 64-bit atomic.

When enabling sync_int_long for nvptx, we run into a failure in
gcc.dg/pr86314.c:
...
 nvptx-run: error getting kernel result: operation not supported on \
   global/shared address space
...
due to a ptx restriction:  accesses to local memory are illegal, and the
test-case does an atomic operation on a stack address, which is mapped to
local memory.

Fix this by adding a target sync_int_long_stack, wich returns false for nvptx,
which can be used to mark test-cases that require sync_int_long support for
stack addresses.

Build on nvptx and tested with make check-gcc.

gcc/testsuite/ChangeLog:

	PR target/96494
	* lib/target-supports.exp (check_effective_target_sync_int_long):
	Return 1 for nvptx.
	(check_effective_target_sync_int_long_stack): New proc.
	* gcc.dg/pr86314.c: Require effective target sync_int_long_stack.
---

diff --git a/gcc/testsuite/gcc.dg/pr86314.c b/gcc/testsuite/gcc.dg/pr86314.c
index 8962a3cf2ff..565fb02eee2 100644
--- a/gcc/testsuite/gcc.dg/pr86314.c
+++ b/gcc/testsuite/gcc.dg/pr86314.c
@@ -1,5 +1,5 @@
 // PR target/86314
-// { dg-do run { target sync_int_long } }
+// { dg-do run { target sync_int_long_stack } }
 // { dg-options "-O2" }
 
 __attribute__((noinline, noclone)) unsigned long
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 4e0d45aaae5..f223fc6917e 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -7704,7 +7704,19 @@ proc check_effective_target_sync_int_long { } {
 	     || [istarget cris-*-*]
 	     || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
 	     || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
-	     || [check_effective_target_mips_llsc] }}]
+	     || [check_effective_target_mips_llsc]
+	     || [istarget nvptx*-*-*]
+	 }}]
+}
+
+# Return 1 if the target supports atomic operations on "int" and "long" on
+# stack addresses.
+
+proc check_effective_target_sync_int_long_stack { } {
+    return [check_cached_effective_target sync_int_long_stack {
+      expr { ![istarget nvptx*-*-*]
+	     && [check_effective_target_sync_int_long]	     
+	 }}]
 }
 
 # Return 1 if the target supports atomic operations on "char" and "short".