From: Florent Kermarrec Date: Fri, 27 Sep 2019 22:42:00 +0000 (+0200) Subject: soc_core/serv: use UART_POLLING (no interrupt support) X-Git-Tag: 24jan2021_ls180~980 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9f6a2ae73e5182d520222cb7baee54ba071cb105;p=litex.git soc_core/serv: use UART_POLLING (no interrupt support) --- diff --git a/litex/soc/integration/soc_core.py b/litex/soc/integration/soc_core.py index 7a4c3980..5ddd8238 100644 --- a/litex/soc/integration/soc_core.py +++ b/litex/soc/integration/soc_core.py @@ -280,6 +280,7 @@ class SoCCore(Module): self.add_cpu(cpu.rocket.RocketRV64(platform, self.cpu_reset_address, self.cpu_variant)) elif cpu_type == "serv": self.add_cpu(cpu.serv.SERV(platform, self.cpu_reset_address, self.cpu_variant)) + self.add_constant("UART_POLLING", None) else: raise ValueError("Unsupported CPU type: {}".format(cpu_type))