From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 2 Nov 2018 08:34:41 +0000 (+0000)
Subject: additional sv flw elwidth tests
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9fb136d7e1ec8a0301918ab7b5307451cbece975;p=riscv-tests.git

additional sv flw elwidth tests
---

diff --git a/isa/rv64uf/sv_fld_elwidth.S b/isa/rv64uf/sv_fld_elwidth.S
index 20cbeeb..4a12a59 100644
--- a/isa/rv64uf/sv_fld_elwidth.S
+++ b/isa/rv64uf/sv_fld_elwidth.S
@@ -14,24 +14,27 @@ RVTEST_RV64UF        # Define TVM used by program.
         la x17, (testdata+elwidth*5);                              \
                                                         \
         li x1, 0xa5a5a5a5a5a5a5a5;                                      \
+        fmv.d.x f25, x1;                                   \
+        fmv.d.x f26, x1;                                   \
+        fmv.d.x f27, x1;                                   \
         fmv.d.x f28, x1;                                   \
         fmv.d.x f29, x1;                                   \
         fmv.d.x f30, x1;                                   \
                                                         \
         SET_SV_MVL( vl);                                  \
         SET_SV_2CSRS( SV_REG_CSR( 1, 12, wid1, 12, 1),        \
-                      SV_REG_CSR( 0, 28, wid2, 28, 1));       \
+                      SV_REG_CSR( 0, 25, wid2, 25, 1));       \
         SET_SV_VL( vl );                                   \
                                                         \
-        inst   f28, 0(x12);                              \
+        inst   f25, 0(x12);                              \
                                                         \
         CLR_SV_CSRS();                                  \
         SET_SV_VL( 1);                                   \
         SET_SV_MVL( 1);                                  \
                                                         \
-        TEST_SV_FW(0, f28, ans, 0);                    \
-        TEST_SV_FW(0, f29, ans, 4);                    \
-        TEST_SV_FW(0, f30, ans, 8);
+        TEST_SV_FW(0, f25, ans, 0);                    \
+        TEST_SV_FW(0, f26, ans, 4);                    \
+        TEST_SV_FW(0, f27, ans, 8);
 
 #define SV_ELWIDTH_TEST( inst, vl, elwidth, wid1, wid2, \
                          testdata, ans ) \
@@ -77,17 +80,15 @@ RVTEST_CODE_BEGIN   # Start of test code.
         SV_ELWIDTH_TEST( fld , 5, 8, SV_W_16BIT, SV_W_32BIT, testdata3, answer4)
         SV_ELWIDTH_TEST( fld , 6, 8, SV_W_32BIT, SV_W_16BIT, testdata4, answer5)
 
+
         SV_ELWIDTH_TESTW(flw , 3, 4, SV_W_DFLT, SV_W_DFLT, testdata1, answer1 )
         SV_ELWIDTH_TESTW(flw , 3, 4, SV_W_16BIT, SV_W_DFLT, testdata3, answer8)
         SV_ELWIDTH_TESTW(flw , 4, 4, SV_W_16BIT, SV_W_32BIT, testdata3, answer4)
-/*
-        XXX: causes unexpected results, possibly memory corruption?
-        SV_ELWIDTH_TESTW(flw , 5, 4, SV_W_16BIT, SV_W_32BIT, testdata3, answer4)
-*/
-/*
-        SV_ELWIDTH_TESTW(flw , 2, 4, SV_W_32BIT, SV_W_16BIT, testdata4, answer5)
+        SV_ELWIDTH_TESTW(flw , 6, 4, SV_W_16BIT, SV_W_32BIT, testdata3, answer4)
+
+        SV_ELWIDTH_TESTW(flw , 6, 4, SV_W_32BIT, SV_W_16BIT, testdata4, answer5)
         SV_ELWIDTH_TESTW(flw , 6, 4, SV_W_DFLT, SV_W_16BIT, testdata6, answer5)
-*/
+
         RVTEST_PASS           # Signal success.
 fail:
         RVTEST_FAIL