From: John David Anglin Date: Fri, 18 Nov 2005 03:22:18 +0000 (+0000) Subject: re PR target/24348 (bootstrap failure building libgcc) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9fb1c9dbc86c1c6aacbb99cb312c006251b9cd65;p=gcc.git re PR target/24348 (bootstrap failure building libgcc) PR target/24348 * config.gcc (hppa*-*-hpux*): Add pa/t-slibgcc-elf-ver to tmake config when not using sjlj exceptions. * config/pa/pa64-hpux.h (LIB_SPEC): Add -lpthread in static links. * config/pa/pa-hpux11.h (LIB_SPEC): Likewise. * config/pa/som.h (ASM_PREFERRED_EH_DATA_FORMAT): Delete define. * config/pa/linux-unwind.h (pa32_fallback_frame_state): Use DWARF_ALT_FRAME_RETURN_COLUMN instead of column 0 as return column. * config/pa/pa-hpux.h (MD_UNWIND_SUPPORT): New define. * config/pa/pa-linux.h (INCOMING_RETURN_ADDR_RTX, DWARF_FRAME_RETURN_COLUMN, ASM_PREFERRED_EH_DATA_FORMAT, ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): Delete defines. * config/pa/pa.h (ARG_POINTER_CFA_OFFSET): Delete. (FRAME_POINTER_CFA_OFFSET, INCOMING_RETURN_ADDR_RTX, DWARF_FRAME_RETURN_COLUMN, DWARF_ALT_FRAME_RETURN_COLUMN, ASM_PREFERRED_EH_DATA_FORMAT, ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New defines. * config/pa/hpux-unwind.h: New file. * testsuite/gcc.dg/cleanup-8.c: Enable test on hppa*-*-hpux*. * testsuite/gcc.dg/cleanup-9.c: Likewise. * testsuite/gcc.dg/cleanup-10.c: Likewise. * testsuite/gcc.dg/cleanup-11.c: Likewise. From-SVN: r107157 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 22a6b70aed2..bc474273bc1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,24 @@ +2005-11-17 John David Anglin + + PR target/24348 + * config.gcc (hppa*-*-hpux*): Add pa/t-slibgcc-elf-ver to tmake config + when not using sjlj exceptions. + * config/pa/pa64-hpux.h (LIB_SPEC): Add -lpthread in static links. + * config/pa/pa-hpux11.h (LIB_SPEC): Likewise. + * config/pa/som.h (ASM_PREFERRED_EH_DATA_FORMAT): Delete define. + * config/pa/linux-unwind.h (pa32_fallback_frame_state): Use + DWARF_ALT_FRAME_RETURN_COLUMN instead of column 0 as return column. + * config/pa/pa-hpux.h (MD_UNWIND_SUPPORT): New define. + * config/pa/pa-linux.h (INCOMING_RETURN_ADDR_RTX, + DWARF_FRAME_RETURN_COLUMN, ASM_PREFERRED_EH_DATA_FORMAT, + ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): Delete defines. + * config/pa/pa.h (ARG_POINTER_CFA_OFFSET): Delete. + (FRAME_POINTER_CFA_OFFSET, INCOMING_RETURN_ADDR_RTX, + DWARF_FRAME_RETURN_COLUMN, DWARF_ALT_FRAME_RETURN_COLUMN, + ASM_PREFERRED_EH_DATA_FORMAT, ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New + defines. + * config/pa/hpux-unwind.h: New file. + 2005-11-17 Alexandre Oliva * config/rs6000/rs6000.h (ASM_OUTPUT_WEAKREF): Define. diff --git a/gcc/config.gcc b/gcc/config.gcc index 21c6dab8cd9..c0867e1e91c 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -900,6 +900,9 @@ hppa[12]*-*-hpux10*) tmake_file="${tmake_file} pa/t-dce-thr" ;; esac + if test x$sjlj != x1; then + tmake_file="$tmake_file pa/t-slibgcc-elf-ver" + fi use_collect2=yes use_fixproto=yes ;; @@ -932,6 +935,9 @@ hppa*64*-*-hpux11*) pa/pa-hpux1010.opt pa/pa64-hpux.opt" need_64bit_hwint=yes tmake_file="pa/t-pa64 pa/t-pa-hpux pa/t-hpux-shlib" + if test x$sjlj != x1; then + tmake_file="$tmake_file pa/t-slibgcc-elf-ver" + fi extra_parts="crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o" case x${enable_threads} in xyes | xposix ) @@ -955,6 +961,9 @@ hppa[12]*-*-hpux11*) ;; esac tmake_file="pa/t-pa pa/t-pa-hpux pa/t-hpux-shlib" + if test x$sjlj != x1; then + tmake_file="$tmake_file pa/t-slibgcc-elf-ver" + fi case x${enable_threads} in xyes | xposix ) thread_file=posix diff --git a/gcc/config/pa/hpux-unwind.h b/gcc/config/pa/hpux-unwind.h new file mode 100644 index 00000000000..aa443bfba0b --- /dev/null +++ b/gcc/config/pa/hpux-unwind.h @@ -0,0 +1,316 @@ +/* DWARF2 EH unwinding support for PA HP-UX. + Copyright (C) 2005 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +In addition to the permissions in the GNU General Public License, the +Free Software Foundation gives you unlimited permission to link the +compiled version of this file with other programs, and to distribute +those programs without any restriction coming from the use of this +file. (The General Public License restrictions do apply in other +respects; for example, they cover modification of the file, and +distribution when not linked into another program.) + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to +the Free Software Foundation, 51 Franklin Street, Fifth Floor, +Boston, MA 02110-1301, USA. */ + +/* Do code reading to identify a signal frame, and set the frame + state data appropriately. See unwind-dw2.c for the structs. */ + +#include +#include +#include + +/* FIXME: We currently ignore the high halves of general, space and + control registers on PA 2.0 machines for applications using the + 32-bit runtime. We don't restore space registers or the floating + point status registers. */ + +#define MD_FALLBACK_FRAME_STATE_FOR pa_fallback_frame_state + +/* HP-UX 10.X doesn't define GetSSReg. */ +#ifndef GetSSReg +#define GetSSReg(ssp, ss_reg) \ + ((UseWideRegs (ssp)) \ + ? (ssp)->ss_wide.ss_32.ss_reg ## _lo \ + : (ssp)->ss_narrow.ss_reg) +#endif + +#if TARGET_64BIT +#define GetSSRegAddr(ssp, ss_reg) ((long) &((ssp)->ss_wide.ss_64.ss_reg)) +#else +#define GetSSRegAddr(ssp, ss_reg) \ + ((UseWideRegs (ssp)) \ + ? (long) &((ssp)->ss_wide.ss_32.ss_reg ## _lo) \ + : (long) &((ssp)->ss_narrow.ss_reg)) +#endif + +#define UPDATE_FS_FOR_SAR(FS, N) \ + (FS)->regs.reg[N].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[N].loc.offset = GetSSRegAddr (mc, ss_cr11) - new_cfa + +#define UPDATE_FS_FOR_GR(FS, GRN, N) \ + (FS)->regs.reg[N].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[N].loc.offset = GetSSRegAddr (mc, ss_gr##GRN) - new_cfa + +#define UPDATE_FS_FOR_FR(FS, FRN, N) \ + (FS)->regs.reg[N].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[N].loc.offset = (long) &(mc->ss_fr##FRN) - new_cfa; + +#define UPDATE_FS_FOR_PC(FS, N) \ + (FS)->regs.reg[N].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[N].loc.offset = GetSSRegAddr (mc, ss_pcoq_head) - new_cfa + +/* Extract bit field from word using HP's numbering (MSB = 0). */ +#define GET_FIELD(X, FROM, TO) \ + ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1)) + +static inline int +sign_extend (int x, int len) +{ + int signbit = (1 << (len - 1)); + int mask = (signbit << 1) - 1; + return ((x & mask) ^ signbit) - signbit; +} + +/* Extract a 17-bit signed constant from branch instructions. */ +static inline int +extract_17 (unsigned word) +{ + return sign_extend (GET_FIELD (word, 19, 28) + | GET_FIELD (word, 29, 29) << 10 + | GET_FIELD (word, 11, 15) << 11 + | (word & 0x1) << 16, 17); +} + +/* Extract a 22-bit signed constant from branch instructions. */ +static inline int +extract_22 (unsigned word) +{ + return sign_extend (GET_FIELD (word, 19, 28) + | GET_FIELD (word, 29, 29) << 10 + | GET_FIELD (word, 11, 15) << 11 + | GET_FIELD (word, 6, 10) << 16 + | (word & 0x1) << 21, 22); +} + +static _Unwind_Reason_Code +pa_fallback_frame_state (struct _Unwind_Context *context, + _Unwind_FrameState *fs) +{ + static long cpu; + unsigned int *pc = (unsigned int *) context->ra; + + if (pc == 0) + return _URC_END_OF_STACK; + + /* Check if the return address points to an export stub (PA 1.1 or 2.0). */ + if ((!TARGET_64BIT + && *(pc + 0) == 0x4bc23fd1 /* ldw -18(sp),rp */ + && *(pc + 1) == 0x004010a1 /* ldsid (rp),r1 */ + && *(pc + 2) == 0x00011820 /* mtsp r1,sr0 */ + && *(pc + 3) == 0xe0400002) /* be,n 0(sr0,rp) */ + || + (!TARGET_64BIT + && *(pc + 0) == 0x4bc23fd1 /* ldw -18(sp),rp */ + && *(pc + 1) == 0xe840d002)) /* bve,n (rp) */ + { + fs->cfa_how = CFA_REG_OFFSET; + fs->cfa_reg = 30; + fs->cfa_offset = 0; + + fs->retaddr_column = 0; + fs->regs.reg[0].how = REG_SAVED_OFFSET; + fs->regs.reg[0].loc.offset = -24; + + return _URC_NO_REASON; + } + + /* Check if the return address is an export stub as signal handlers + may return via an export stub. */ + if (!TARGET_64BIT + && (*pc & 0xffe0e002) == 0xe8400000 /* bl x,r2 */ + && *(pc + 1) == 0x08000240 /* nop */ + && *(pc + 2) == 0x4bc23fd1 /* ldw -18(sp),rp */ + && *(pc + 3) == 0x004010a1 /* ldsid (rp),r1 */ + && *(pc + 4) == 0x00011820 /* mtsp r1,sr0 */ + && *(pc + 5) == 0xe0400002) /* be,n 0(sr0,rp) */ + /* Extract target address from PA 1.x 17-bit branch. */ + pc += extract_17 (*pc) + 2; + else if (!TARGET_64BIT + && (*pc & 0xfc00e002) == 0xe800a000 /* b,l x,r2 */ + && *(pc + 1) == 0x08000240 /* nop */ + && *(pc + 2) == 0x4bc23fd1 /* ldw -18(sp),rp */ + && *(pc + 3) == 0xe840d002) /* bve,n (rp) */ + /* Extract target address from PA 2.0 22-bit branch. */ + pc += extract_22 (*pc) + 2; + + /* Now check if the return address is one of the signal handler + returns, _sigreturn or _sigsetreturn. */ + if ((TARGET_64BIT + && *(pc + 0) == 0x53db3f51 /* ldd -58(sp),dp */ + && *(pc + 8) == 0x34160116 /* ldi 8b,r22 */ + && *(pc + 9) == 0x08360ac1 /* shladd,l r22,3,r1,r1 */ + && *(pc + 10) == 0x0c2010c1 /* ldd 0(r1),r1 */ + && *(pc + 11) == 0xe4202000) /* be,l 0(sr4,r1) */ + || + (TARGET_64BIT + && *(pc + 0) == 0x36dc0000 /* ldo 0(r22),ret0 */ + && *(pc + 6) == 0x341601c0 /* ldi e0,r22 */ + && *(pc + 7) == 0x08360ac1 /* shladd,l r22,3,r1,r1 */ + && *(pc + 8) == 0x0c2010c1 /* ldd 0(r1),r1 */ + && *(pc + 9) == 0xe4202000) /* be,l 0(sr4,r1) */ + || + (!TARGET_64BIT + && *(pc + 0) == 0x379a0000 /* ldo 0(ret0),r26 */ + && *(pc + 1) == 0x6bd33fc9 /* stw r19,-1c(sp) */ + && *(pc + 2) == 0x20200801 /* ldil L%-40000000,r1 */ + && *(pc + 3) == 0xe420e008 /* be,l 4(sr7,r1) */ + && *(pc + 4) == 0x34160116) /* ldi 8b,r22 */ + || + (!TARGET_64BIT + && *(pc + 0) == 0x6bd33fc9 /* stw r19,-1c(sp) */ + && *(pc + 1) == 0x20200801 /* ldil L%-40000000,r1 */ + && *(pc + 2) == 0xe420e008 /* be,l 4(sr7,r1) */ + && *(pc + 3) == 0x341601c0)) /* ldi e0,r22 */ + { + /* The previous stack pointer is saved at (long *)SP - 1. The + ucontext structure is offset from the start of the previous + frame by the siglocal_misc structure. */ + struct siglocalx *sl = (struct siglocalx *) + (*((long *) context->cfa - 1)); + mcontext_t *mc = &(sl->sl_uc.uc_mcontext); + + long new_cfa = GetSSReg (mc, ss_sp); + + fs->cfa_how = CFA_REG_OFFSET; + fs->cfa_reg = 30; + fs->cfa_offset = new_cfa - (long) context->cfa; + + UPDATE_FS_FOR_GR (fs, 1, 1); + UPDATE_FS_FOR_GR (fs, 2, 2); + UPDATE_FS_FOR_GR (fs, 3, 3); + UPDATE_FS_FOR_GR (fs, 4, 4); + UPDATE_FS_FOR_GR (fs, 5, 5); + UPDATE_FS_FOR_GR (fs, 6, 6); + UPDATE_FS_FOR_GR (fs, 7, 7); + UPDATE_FS_FOR_GR (fs, 8, 8); + UPDATE_FS_FOR_GR (fs, 9, 9); + UPDATE_FS_FOR_GR (fs, 10, 10); + UPDATE_FS_FOR_GR (fs, 11, 11); + UPDATE_FS_FOR_GR (fs, 12, 12); + UPDATE_FS_FOR_GR (fs, 13, 13); + UPDATE_FS_FOR_GR (fs, 14, 14); + UPDATE_FS_FOR_GR (fs, 15, 15); + UPDATE_FS_FOR_GR (fs, 16, 16); + UPDATE_FS_FOR_GR (fs, 17, 17); + UPDATE_FS_FOR_GR (fs, 18, 18); + UPDATE_FS_FOR_GR (fs, 19, 19); + UPDATE_FS_FOR_GR (fs, 20, 20); + UPDATE_FS_FOR_GR (fs, 21, 21); + UPDATE_FS_FOR_GR (fs, 22, 22); + UPDATE_FS_FOR_GR (fs, 23, 23); + UPDATE_FS_FOR_GR (fs, 24, 24); + UPDATE_FS_FOR_GR (fs, 25, 25); + UPDATE_FS_FOR_GR (fs, 26, 26); + UPDATE_FS_FOR_GR (fs, 27, 27); + UPDATE_FS_FOR_GR (fs, 28, 28); + UPDATE_FS_FOR_GR (fs, 29, 29); + UPDATE_FS_FOR_GR (fs, 30, 30); + UPDATE_FS_FOR_GR (fs, 31, 31); + + if (TARGET_64BIT) + { + UPDATE_FS_FOR_FR (fs, 4, 32); + UPDATE_FS_FOR_FR (fs, 5, 33); + UPDATE_FS_FOR_FR (fs, 6, 34); + UPDATE_FS_FOR_FR (fs, 7, 35); + UPDATE_FS_FOR_FR (fs, 8, 36); + UPDATE_FS_FOR_FR (fs, 9, 37); + UPDATE_FS_FOR_FR (fs, 10, 38); + UPDATE_FS_FOR_FR (fs, 11, 39); + UPDATE_FS_FOR_FR (fs, 12, 40); + UPDATE_FS_FOR_FR (fs, 13, 41); + UPDATE_FS_FOR_FR (fs, 14, 42); + UPDATE_FS_FOR_FR (fs, 15, 43); + UPDATE_FS_FOR_FR (fs, 16, 44); + UPDATE_FS_FOR_FR (fs, 17, 45); + UPDATE_FS_FOR_FR (fs, 18, 46); + UPDATE_FS_FOR_FR (fs, 19, 47); + UPDATE_FS_FOR_FR (fs, 20, 48); + UPDATE_FS_FOR_FR (fs, 21, 49); + UPDATE_FS_FOR_FR (fs, 22, 50); + UPDATE_FS_FOR_FR (fs, 23, 51); + UPDATE_FS_FOR_FR (fs, 24, 52); + UPDATE_FS_FOR_FR (fs, 25, 53); + UPDATE_FS_FOR_FR (fs, 26, 54); + UPDATE_FS_FOR_FR (fs, 27, 55); + UPDATE_FS_FOR_FR (fs, 28, 56); + UPDATE_FS_FOR_FR (fs, 29, 57); + UPDATE_FS_FOR_FR (fs, 30, 58); + UPDATE_FS_FOR_FR (fs, 31, 59); + + UPDATE_FS_FOR_SAR (fs, 60); + } + else + { + UPDATE_FS_FOR_FR (fs, 4, 32); + UPDATE_FS_FOR_FR (fs, 5, 34); + UPDATE_FS_FOR_FR (fs, 6, 36); + UPDATE_FS_FOR_FR (fs, 7, 38); + UPDATE_FS_FOR_FR (fs, 8, 40); + UPDATE_FS_FOR_FR (fs, 9, 44); + UPDATE_FS_FOR_FR (fs, 10, 44); + UPDATE_FS_FOR_FR (fs, 11, 46); + UPDATE_FS_FOR_FR (fs, 12, 48); + UPDATE_FS_FOR_FR (fs, 13, 50); + UPDATE_FS_FOR_FR (fs, 14, 52); + UPDATE_FS_FOR_FR (fs, 15, 54); + + if (!cpu) + cpu = sysconf (_SC_CPU_VERSION); + + /* PA-RISC 1.0 only has 16 floating point registers. */ + if (cpu != CPU_PA_RISC1_0) + { + UPDATE_FS_FOR_FR (fs, 16, 56); + UPDATE_FS_FOR_FR (fs, 17, 58); + UPDATE_FS_FOR_FR (fs, 18, 60); + UPDATE_FS_FOR_FR (fs, 19, 62); + UPDATE_FS_FOR_FR (fs, 20, 64); + UPDATE_FS_FOR_FR (fs, 21, 66); + UPDATE_FS_FOR_FR (fs, 22, 68); + UPDATE_FS_FOR_FR (fs, 23, 70); + UPDATE_FS_FOR_FR (fs, 24, 72); + UPDATE_FS_FOR_FR (fs, 25, 74); + UPDATE_FS_FOR_FR (fs, 26, 76); + UPDATE_FS_FOR_FR (fs, 27, 78); + UPDATE_FS_FOR_FR (fs, 28, 80); + UPDATE_FS_FOR_FR (fs, 29, 82); + UPDATE_FS_FOR_FR (fs, 30, 84); + UPDATE_FS_FOR_FR (fs, 31, 86); + } + + UPDATE_FS_FOR_SAR (fs, 88); + } + + fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN; + UPDATE_FS_FOR_PC (fs, DWARF_ALT_FRAME_RETURN_COLUMN); + + return _URC_NO_REASON; + } + + return _URC_END_OF_STACK; +} diff --git a/gcc/config/pa/linux-unwind.h b/gcc/config/pa/linux-unwind.h index 62fa065cf0e..36b9b382708 100644 --- a/gcc/config/pa/linux-unwind.h +++ b/gcc/config/pa/linux-unwind.h @@ -131,8 +131,9 @@ pa32_fallback_frame_state (struct _Unwind_Context *context, } fs->regs.reg[88].how = REG_SAVED_OFFSET; fs->regs.reg[88].loc.offset = (long) &sc->sc_sar - new_cfa; - fs->regs.reg[0].how = REG_SAVED_OFFSET; - fs->regs.reg[0].loc.offset = (long) &sc->sc_iaoq[0] - new_cfa; - fs->retaddr_column = 0; + fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].how = REG_SAVED_OFFSET; + fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].loc.offset + = (long) &sc->sc_iaoq[0] - new_cfa; + fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN; return _URC_NO_REASON; } diff --git a/gcc/config/pa/pa-hpux.h b/gcc/config/pa/pa-hpux.h index 0aa3361459e..4b6c91092f3 100644 --- a/gcc/config/pa/pa-hpux.h +++ b/gcc/config/pa/pa-hpux.h @@ -124,3 +124,5 @@ Boston, MA 02110-1301, USA. */ /* Define this so we can compile MS code for use with WINE. */ #undef HANDLE_PRAGMA_PACK_PUSH_POP #define HANDLE_PRAGMA_PACK_PUSH_POP + +#define MD_UNWIND_SUPPORT "config/pa/hpux-unwind.h" diff --git a/gcc/config/pa/pa-hpux11.h b/gcc/config/pa/pa-hpux11.h index 7b34fe1ad47..ad16bb41e3f 100644 --- a/gcc/config/pa/pa-hpux11.h +++ b/gcc/config/pa/pa-hpux11.h @@ -134,7 +134,7 @@ Boston, MA 02110-1301, USA. */ #define LIB_SPEC \ "%{!shared:\ %{mt|pthread:-lpthread} -lc \ - %{static:%{!nolibdld:-a shared -ldld -a archive -lc}}}" + %{static:%{!nolibdld:-a shared -ldld -a archive -lpthread -lc}}}" #undef STARTFILE_SPEC #define STARTFILE_SPEC \ diff --git a/gcc/config/pa/pa-linux.h b/gcc/config/pa/pa-linux.h index 4115577dc62..fcbcebdb949 100644 --- a/gcc/config/pa/pa-linux.h +++ b/gcc/config/pa/pa-linux.h @@ -19,39 +19,6 @@ the Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ -/* A C expression whose value is RTL representing the location of the - incoming return address at the beginning of any function, before the - prologue. You only need to define this macro if you want to support - call frame debugging information like that provided by DWARF 2. */ -#define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2)) -#define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2)) - -/* This macro chooses the encoding of pointers embedded in the exception - handling sections. If at all possible, this should be defined such - that the exception handling section will not require dynamic relocations, - and so may be read-only. - - FIXME: We use DW_EH_PE_aligned to output a PLABEL constructor for - global function pointers. */ -#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \ - (CODE == 2 && GLOBAL ? DW_EH_PE_aligned : DW_EH_PE_absptr) - -/* Handle special EH pointer encodings. Absolute, pc-relative, and - indirect are handled automatically. Since pc-relative encoding is - not possible on the PA and we don't have the infrastructure for - data relative encoding, we use aligned plabels for global function - pointers. */ -#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \ - do { \ - if (((ENCODING) & 0x0F) == DW_EH_PE_aligned) \ - { \ - fputs (integer_asm_op (SIZE, FALSE), FILE); \ - fputs ("P%", FILE); \ - assemble_name (FILE, XSTR (ADDR, 0)); \ - goto DONE; \ - } \ - } while (0) - #undef TARGET_OS_CPP_BUILTINS #define TARGET_OS_CPP_BUILTINS() \ do \ diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h index fa43828225e..b83630fba32 100644 --- a/gcc/config/pa/pa.h +++ b/gcc/config/pa/pa.h @@ -404,12 +404,72 @@ extern struct rtx_def *hppa_pic_save_rtx (void); gen_rtx_MEM (word_mode, \ gen_rtx_PLUS (word_mode, frame_pointer_rtx, \ TARGET_64BIT ? GEN_INT (-16) : GEN_INT (-20))) - -/* Offset from the argument pointer register value to the top of - stack. This is different from FIRST_PARM_OFFSET because of the - frame marker. */ -#define ARG_POINTER_CFA_OFFSET(FNDECL) 0 +/* Offset from the frame pointer register value to the top of stack. */ +#define FRAME_POINTER_CFA_OFFSET(FNDECL) 0 + +/* A C expression whose value is RTL representing the location of the + incoming return address at the beginning of any function, before the + prologue. You only need to define this macro if you want to support + call frame debugging information like that provided by DWARF 2. */ +#define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2)) +#define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2)) + +/* A C expression whose value is an integer giving a DWARF 2 column + number that may be used as an alternate return column. This should + be defined only if DWARF_FRAME_RETURN_COLUMN is set to a general + register, but an alternate column needs to be used for signal frames. + + Column 0 is not used but unfortunately its register size is set to + 4 bytes (sizeof CCmode) so it can't be used on 64-bit targets. */ +#define DWARF_ALT_FRAME_RETURN_COLUMN FIRST_PSEUDO_REGISTER + +/* This macro chooses the encoding of pointers embedded in the exception + handling sections. If at all possible, this should be defined such + that the exception handling section will not require dynamic relocations, + and so may be read-only. + + Because the HP assembler auto aligns, it is necessary to use + DW_EH_PE_aligned. It's not possible to make the data read-only + on the HP-UX SOM port since the linker requires fixups for label + differences in different sections to be word aligned. However, + the SOM linker can do unaligned fixups for absolute pointers. + We also need aligned pointers for global and function pointers. + + Although the HP-UX 64-bit ELF linker can handle unaligned pc-relative + fixups, the runtime doesn't have a consistent relationship between + text and data for dynamically loaded objects. Thus, it's not possible + to use pc-relative encoding for pointers on this target. It may be + possible to use segment relative encodings but GAS doesn't currently + have a mechanism to generate these encodings. For other targets, we + use pc-relative encoding for pointers. If the pointer might require + dynamic relocation, we make it indirect. */ +#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \ + (TARGET_GAS && !TARGET_HPUX \ + ? (DW_EH_PE_pcrel \ + | ((GLOBAL) || (CODE) == 2 ? DW_EH_PE_indirect : 0) \ + | (TARGET_64BIT ? DW_EH_PE_sdata8 : DW_EH_PE_sdata4)) \ + : (!TARGET_GAS || (GLOBAL) || (CODE) == 2 \ + ? DW_EH_PE_aligned : DW_EH_PE_absptr)) + +/* Handle special EH pointer encodings. Absolute, pc-relative, and + indirect are handled automatically. We output pc-relative, and + indirect pc-relative ourself since we need some special magic to + generate pc-relative relocations, and to handle indirect function + pointers. */ +#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \ + do { \ + if (((ENCODING) & 0x70) == DW_EH_PE_pcrel) \ + { \ + fputs (integer_asm_op (SIZE, FALSE), FILE); \ + if ((ENCODING) & DW_EH_PE_indirect) \ + output_addr_const (FILE, get_deferred_plabel (ADDR)); \ + else \ + assemble_name (FILE, XSTR ((ADDR), 0)); \ + fputs ("+8-$PIC_pcrel$0", FILE); \ + goto DONE; \ + } \ + } while (0) /* The letters I, J, K, L and M in a register constraint string can be used to stand for particular ranges of immediate operands. diff --git a/gcc/config/pa/pa64-hpux.h b/gcc/config/pa/pa64-hpux.h index 056f3d83d8b..9f51f66ae31 100644 --- a/gcc/config/pa/pa64-hpux.h +++ b/gcc/config/pa/pa64-hpux.h @@ -56,23 +56,25 @@ Boston, MA 02110-1301, USA. */ #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_GNU_LD) #define LIB_SPEC \ "%{!shared:\ - %{!p:%{!pg: -lc %{static:%{!nolibdld:-a shared -ldld -a archive -lc}}}}\ + %{!p:%{!pg: %{static:-lpthread} -lc\ + %{static:%{!nolibdld:-a shared -ldld -a archive -lc}}}}\ %{p:%{!pg:%{static:%{!mhp-ld:-a shared}%{mhp-ld:-a archive_shared}}\ - -lprof %{static:-a archive} -lc\ + -lprof %{static:-a archive -lpthread} -lc\ %{static:%{!nolibdld:-a shared -ldld -a archive -lc}}}}\ %{pg:%{static:%{!mhp-ld:-a shared}%{mhp-ld:-a archive_shared}}\ - -lgprof %{static:-a archive} -lc\ + -lgprof %{static:-a archive -lpthread} -lc\ %{static:%{!nolibdld:-a shared -ldld -a archive -lc}}}}\ /usr/lib/pa20_64/milli.a" #else #define LIB_SPEC \ "%{!shared:\ - %{!p:%{!pg: -lc %{static:%{!nolibdld:-a shared -ldld -a archive -lc}}}}\ + %{!p:%{!pg: %{static:-lpthread} -lc\ + %{static:%{!nolibdld:-a shared -ldld -a archive -lc}}}}\ %{p:%{!pg:%{static:%{mgnu-ld:-a shared}%{!mgnu-ld:-a archive_shared}}\ - -lprof %{static:-a archive} -lc\ + -lprof %{static:-a archive -lpthread} -lc\ %{static:%{!nolibdld:-a shared -ldld -a archive -lc}}}}\ %{pg:%{static:%{mgnu-ld:-a shared}%{!mgnu-ld:-a archive_shared}}\ - -lgprof %{static:-a archive} -lc\ + -lgprof %{static:-a archive -lpthread} -lc\ %{static:%{!nolibdld:-a shared -ldld -a archive -lc}}}}\ /usr/lib/pa20_64/milli.a" #endif diff --git a/gcc/config/pa/som.h b/gcc/config/pa/som.h index 109e2a16476..e397b9dfd8e 100644 --- a/gcc/config/pa/som.h +++ b/gcc/config/pa/som.h @@ -34,15 +34,6 @@ Boston, MA 02110-1301, USA. */ #define DBX_OUTPUT_NULL_N_SO_AT_MAIN_SOURCE_FILE_END -/* Select a format to encode pointers in exception handling data. CODE - is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is - true if the symbol may be affected by dynamic relocations. Because - the HP assembler does auto alignment, it is necessary to use - DW_EH_PE_aligned instead of the default DW_EH_PE_absptr. */ - -#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ - (TARGET_GAS ? DW_EH_PE_absptr : DW_EH_PE_aligned) - /* HPUX has a program 'chatr' to list the dependencies of dynamically linked executables and shared libraries. */ #define LDD_SUFFIX "chatr" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index db4aa5a0798..50ada5db973 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2005-11-17 John David Anglin + + * gcc.dg/cleanup-8.c: Enable test on hppa*-*-hpux*. + * gcc.dg/cleanup-9.c: Likewise. + * gcc.dg/cleanup-10.c: Likewise. + * gcc.dg/cleanup-11.c: Likewise. + 2005-11-17 Francois-Xavier Coudert PR fortran/24892 diff --git a/gcc/testsuite/gcc.dg/cleanup-10.c b/gcc/testsuite/gcc.dg/cleanup-10.c index e8ae3bca78e..beac2ecd56f 100644 --- a/gcc/testsuite/gcc.dg/cleanup-10.c +++ b/gcc/testsuite/gcc.dg/cleanup-10.c @@ -1,4 +1,4 @@ -/* { dg-do run { target *-*-linux* powerpc*-*-darwin* } } */ +/* { dg-do run { target hppa*-*-hpux* *-*-linux* powerpc*-*-darwin* } } */ /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */ /* Verify that cleanups work with exception handling through signal frames on alternate stack. */ diff --git a/gcc/testsuite/gcc.dg/cleanup-11.c b/gcc/testsuite/gcc.dg/cleanup-11.c index ff315f73d7a..8330c2b4bbe 100644 --- a/gcc/testsuite/gcc.dg/cleanup-11.c +++ b/gcc/testsuite/gcc.dg/cleanup-11.c @@ -1,4 +1,4 @@ -/* { dg-do run { target *-*-linux* powerpc*-*-darwin* } } */ +/* { dg-do run { target hppa*-*-hpux* *-*-linux* powerpc*-*-darwin* } } */ /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */ /* Verify that cleanups work with exception handling through realtime signal frames on alternate stack. */ diff --git a/gcc/testsuite/gcc.dg/cleanup-8.c b/gcc/testsuite/gcc.dg/cleanup-8.c index 321e1f029df..3aca7223bd7 100644 --- a/gcc/testsuite/gcc.dg/cleanup-8.c +++ b/gcc/testsuite/gcc.dg/cleanup-8.c @@ -1,4 +1,4 @@ -/* { dg-do run { target *-*-linux* powerpc*-*-darwin* } } */ +/* { dg-do run { target hppa*-*-hpux* *-*-linux* powerpc*-*-darwin* } } */ /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */ /* Verify that cleanups work with exception handling through signal frames. */ diff --git a/gcc/testsuite/gcc.dg/cleanup-9.c b/gcc/testsuite/gcc.dg/cleanup-9.c index c3ac5fb726b..62a7e800179 100644 --- a/gcc/testsuite/gcc.dg/cleanup-9.c +++ b/gcc/testsuite/gcc.dg/cleanup-9.c @@ -1,4 +1,4 @@ -/* { dg-do run { target *-*-linux* powerpc*-*-darwin* } } */ +/* { dg-do run { target hppa*-*-hpux* *-*-linux* powerpc*-*-darwin* } } */ /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */ /* Verify that cleanups work with exception handling through realtime signal frames. */