From: James E Wilson Date: Wed, 18 Aug 2004 23:45:32 +0000 (+0000) Subject: Add support for scheduling recip.fmt instructions. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=9ff6992e3d912f5feaf2a6ed8df75481c54dbb1b;p=gcc.git Add support for scheduling recip.fmt instructions. * config/mips/mips.md (type): Add frdiv. (divsf3+1, divsf3+2): Change type to frdiv. * config/mips/sb1.md (ir_sb1_recipsf_2pipes, ir_sb1_recipsf_1pipe, ir_sb1_recipdf_2pipes, ir_sb1_recipdf_1pipe): New. * config/mips/3000.md (r3k_fdiv_single, r3k_fdiv_double): Add frdiv. * config/mips/4300.md (r4300_fdiv_single, r4300_fdiv_double): Likewise. * config/mips/4600.md (r4600_fdiv_single, f4600_fdiv_double): Likewise. * config/mips/5000.md (r5k_fdiv_single): Likewise. * config/mips/5400.md (ir_vr54_fdiv_sf, ir_vr54_fdiv_df): Likewise. * config/mips/5500.md (ir_vr55_fdiv_sf, ir_vr55_fdiv_df): Likewise. * config/mips/6000.md (r6k_fdiv_single, r6k_fdiv_double): Likewise. * config/mips/7000.md (rm7_fp_divsqrt_df, rm7_fp_divsqrt_sf): Likewise. * config/mips/9000.md (rm8k_fdivs, rm9k_fdivd): Likewise. * config/mips/generic.md (generic_fdiv_single, generic_fdiv_double): Likewise. * config/mips/sr71k.md (ir_sr70_fdiv_sf, ir_sr70_fdiv_df): Likewise. From-SVN: r86216 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fd73c037e45..2cde6ad7244 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,23 @@ +2004-08-18 James E Wilson + + * config/mips/mips.md (type): Add frdiv. + (divsf3+1, divsf3+2): Change type to frdiv. + * config/mips/sb1.md (ir_sb1_recipsf_2pipes, ir_sb1_recipsf_1pipe, + ir_sb1_recipdf_2pipes, ir_sb1_recipdf_1pipe): New. + + * config/mips/3000.md (r3k_fdiv_single, r3k_fdiv_double): Add frdiv. + * config/mips/4300.md (r4300_fdiv_single, r4300_fdiv_double): Likewise. + * config/mips/4600.md (r4600_fdiv_single, f4600_fdiv_double): Likewise. + * config/mips/5000.md (r5k_fdiv_single): Likewise. + * config/mips/5400.md (ir_vr54_fdiv_sf, ir_vr54_fdiv_df): Likewise. + * config/mips/5500.md (ir_vr55_fdiv_sf, ir_vr55_fdiv_df): Likewise. + * config/mips/6000.md (r6k_fdiv_single, r6k_fdiv_double): Likewise. + * config/mips/7000.md (rm7_fp_divsqrt_df, rm7_fp_divsqrt_sf): Likewise. + * config/mips/9000.md (rm8k_fdivs, rm9k_fdivd): Likewise. + * config/mips/generic.md (generic_fdiv_single, generic_fdiv_double): + Likewise. + * config/mips/sr71k.md (ir_sr70_fdiv_sf, ir_sr70_fdiv_df): Likewise. + 2004-08-18 Robert Bowdidge * config/rs6000/x-darwin: Remove XCFLAGS -mdynamic-no-pic to diff --git a/gcc/config/mips/3000.md b/gcc/config/mips/3000.md index d0334115e48..f9a829175d4 100644 --- a/gcc/config/mips/3000.md +++ b/gcc/config/mips/3000.md @@ -61,12 +61,12 @@ (define_insn_reservation "r3k_fdiv_single" 12 (and (eq_attr "cpu" "r3000,r3900") - (and (eq_attr "type" "fdiv") + (and (eq_attr "type" "fdiv,frdiv") (eq_attr "mode" "SF"))) "alu") (define_insn_reservation "r3k_fdiv_double" 19 (and (eq_attr "cpu" "r3000,r3900") - (and (eq_attr "type" "fdiv") + (and (eq_attr "type" "fdiv,frdiv") (eq_attr "mode" "DF"))) "alu") diff --git a/gcc/config/mips/4300.md b/gcc/config/mips/4300.md index 16ec77e7dd3..d663f16d6fb 100644 --- a/gcc/config/mips/4300.md +++ b/gcc/config/mips/4300.md @@ -75,12 +75,12 @@ (define_insn_reservation "r4300_fdiv_single" 29 (and (eq_attr "cpu" "r4300") - (and (eq_attr "type" "fdiv,fsqrt,frsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt") (eq_attr "mode" "SF"))) "imuldiv*29") (define_insn_reservation "r4300_fdiv_double" 58 (and (eq_attr "cpu" "r4300") - (and (eq_attr "type" "fdiv,fsqrt,frsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt") (eq_attr "mode" "DF"))) "imuldiv*58") diff --git a/gcc/config/mips/4600.md b/gcc/config/mips/4600.md index 155ef7489f9..58b309959d7 100644 --- a/gcc/config/mips/4600.md +++ b/gcc/config/mips/4600.md @@ -65,13 +65,13 @@ (define_insn_reservation "r4600_fdiv_single" 32 (and (eq_attr "cpu" "r4600,r4650") - (and (eq_attr "type" "fdiv") + (and (eq_attr "type" "fdiv,frdiv") (eq_attr "mode" "SF"))) "alu") (define_insn_reservation "r4600_fdiv_double" 61 (and (eq_attr "cpu" "r4600,r4650") - (and (eq_attr "type" "fdiv") + (and (eq_attr "type" "fdiv,frdiv") (eq_attr "mode" "DF"))) "alu") diff --git a/gcc/config/mips/5000.md b/gcc/config/mips/5000.md index 66e981ce66f..9b02ac32942 100644 --- a/gcc/config/mips/5000.md +++ b/gcc/config/mips/5000.md @@ -70,7 +70,7 @@ (define_insn_reservation "r5k_fdiv_single" 21 (and (eq_attr "cpu" "r5000") - (and (eq_attr "type" "fdiv,fsqrt,frsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt") (eq_attr "mode" "SF"))) "alu") diff --git a/gcc/config/mips/5400.md b/gcc/config/mips/5400.md index 9bf09ce9f5b..f39dc884d04 100644 --- a/gcc/config/mips/5400.md +++ b/gcc/config/mips/5400.md @@ -123,13 +123,13 @@ (define_insn_reservation "ir_vr54_fdiv_sf" 42 (and (eq_attr "cpu" "r5400") - (and (eq_attr "type" "fdiv,fsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt") (eq_attr "mode" "SF"))) "vr54_dp0|vr54_dp1") (define_insn_reservation "ir_vr54_fdiv_df" 72 (and (eq_attr "cpu" "r5400") - (and (eq_attr "type" "fdiv,fsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt") (eq_attr "mode" "DF"))) "vr54_dp0|vr54_dp1") diff --git a/gcc/config/mips/5500.md b/gcc/config/mips/5500.md index d5344227d0a..fbcc6f62d6e 100644 --- a/gcc/config/mips/5500.md +++ b/gcc/config/mips/5500.md @@ -159,13 +159,13 @@ (define_insn_reservation "ir_vr55_fdiv_sf" 30 (and (eq_attr "cpu" "r5500") - (and (eq_attr "type" "fdiv,fsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt") (eq_attr "mode" "SF"))) "vr55_mac") (define_insn_reservation "ir_vr55_fdiv_df" 59 (and (eq_attr "cpu" "r5500") - (and (eq_attr "type" "fdiv,fsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt") (eq_attr "mode" "DF"))) "vr55_mac") diff --git a/gcc/config/mips/6000.md b/gcc/config/mips/6000.md index 8a5b9f5196c..92089caab52 100644 --- a/gcc/config/mips/6000.md +++ b/gcc/config/mips/6000.md @@ -46,12 +46,12 @@ (define_insn_reservation "r6k_fdiv_single" 15 (and (eq_attr "cpu" "r6000") - (and (eq_attr "type" "fdiv") + (and (eq_attr "type" "fdiv,frdiv") (eq_attr "mode" "SF"))) "alu") (define_insn_reservation "r6k_fdiv_double" 16 (and (eq_attr "cpu" "r6000") - (and (eq_attr "type" "fdiv") + (and (eq_attr "type" "fdiv,frdiv") (eq_attr "mode" "DF"))) "alu") diff --git a/gcc/config/mips/7000.md b/gcc/config/mips/7000.md index f0003ba2d6b..ec75ffc96f8 100644 --- a/gcc/config/mips/7000.md +++ b/gcc/config/mips/7000.md @@ -169,13 +169,13 @@ (define_insn_reservation "rm7_fp_divsqrt_df" 36 (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "fdiv,fsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt") (eq_attr "mode" "DF"))) "rm7_fpdivsqr+(rm7_fpdivsqr_iter*36)") (define_insn_reservation "rm7_fp_divsqrt_sf" 21 (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "fdiv,fsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt") (eq_attr "mode" "SF"))) "rm7_fpdivsqr+(rm7_fpdivsqr_iter*21)") diff --git a/gcc/config/mips/9000.md b/gcc/config/mips/9000.md index b99dbbe478f..b5501c3d696 100644 --- a/gcc/config/mips/9000.md +++ b/gcc/config/mips/9000.md @@ -131,13 +131,13 @@ (define_insn_reservation "rm9k_fdivs" 22 (and (eq_attr "cpu" "r9000") - (and (eq_attr "type" "fdiv,fsqrt,frsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt") (eq_attr "mode" "SF"))) "rm9k_f_float + rm9k_fdiv * 22") (define_insn_reservation "rm9k_fdivd" 37 (and (eq_attr "cpu" "r9000") - (and (eq_attr "type" "fdiv,fsqrt,frsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt") (eq_attr "mode" "DF"))) "rm9k_f_float + rm9k_fdiv * 37") diff --git a/gcc/config/mips/generic.md b/gcc/config/mips/generic.md index c9e85e971c2..6ae56490965 100644 --- a/gcc/config/mips/generic.md +++ b/gcc/config/mips/generic.md @@ -82,12 +82,12 @@ "alu") (define_insn_reservation "generic_fdiv_single" 23 - (and (eq_attr "type" "fdiv") + (and (eq_attr "type" "fdiv,frdiv") (eq_attr "mode" "SF")) "alu") (define_insn_reservation "generic_fdiv_double" 36 - (and (eq_attr "type" "fdiv") + (and (eq_attr "type" "fdiv,frdiv") (eq_attr "mode" "DF")) "alu") diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 8a6440e41c3..603a6b9d18c 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -113,6 +113,7 @@ ;; fmul floating point multiply ;; fmadd floating point multiply-add ;; fdiv floating point divide +;; frdiv floating point reciprocal divide ;; fabs floating point absolute value ;; fneg floating point negation ;; fcmp floating point compare @@ -122,7 +123,7 @@ ;; multi multiword sequence (or user asm statements) ;; nop no operation (define_attr "type" - "unknown,branch,jump,call,load,fpload,fpidxload,store,fpstore,fpidxstore,prefetch,prefetchx,condmove,xfer,mthilo,mfhilo,const,arith,shift,slt,clz,trap,imul,imadd,idiv,fmove,fadd,fmul,fmadd,fdiv,fabs,fneg,fcmp,fcvt,fsqrt,frsqrt,multi,nop" + "unknown,branch,jump,call,load,fpload,fpidxload,store,fpstore,fpidxstore,prefetch,prefetchx,condmove,xfer,mthilo,mfhilo,const,arith,shift,slt,clz,trap,imul,imadd,idiv,fmove,fadd,fmul,fmadd,fdiv,frdiv,fabs,fneg,fcmp,fcvt,fsqrt,frsqrt,multi,nop" (cond [(eq_attr "jal" "!unset") (const_string "call") (eq_attr "got" "load") (const_string "load")] (const_string "unknown"))) @@ -2092,7 +2093,7 @@ else return "recip.d\t%0,%2"; } - [(set_attr "type" "fdiv") + [(set_attr "type" "frdiv") (set_attr "mode" "DF") (set (attr "length") (if_then_else (ne (symbol_ref "TARGET_FIX_SB1") (const_int 0)) @@ -2112,7 +2113,7 @@ else return "recip.s\t%0,%2"; } - [(set_attr "type" "fdiv") + [(set_attr "type" "frdiv") (set_attr "mode" "SF") (set (attr "length") (if_then_else (ne (symbol_ref "TARGET_FIX_SB1") (const_int 0)) diff --git a/gcc/config/mips/sb1.md b/gcc/config/mips/sb1.md index 620de13d62e..c831a47cbdf 100644 --- a/gcc/config/mips/sb1.md +++ b/gcc/config/mips/sb1.md @@ -435,6 +435,40 @@ (eq_attr "sb1_fp_pipes" "one")))) "sb1_fp1") +;; ??? Can deliver at most 1 result per every 3 cycles because of issue +;; restrictions. + +(define_insn_reservation "ir_sb1_recipsf_2pipes" 12 + (and (eq_attr "cpu" "sb1") + (and (eq_attr "type" "frdiv") + (and (eq_attr "mode" "SF") + (eq_attr "sb1_fp_pipes" "two")))) + "sb1_fp1 | sb1_fp0") + +(define_insn_reservation "ir_sb1_recipsf_1pipe" 12 + (and (eq_attr "cpu" "sb1") + (and (eq_attr "type" "frdiv") + (and (eq_attr "mode" "SF") + (eq_attr "sb1_fp_pipes" "one")))) + "sb1_fp1") + +;; ??? Can deliver at most 1 result per every 5 cycles because of issue +;; restrictions. + +(define_insn_reservation "ir_sb1_recipdf_2pipes" 20 + (and (eq_attr "cpu" "sb1") + (and (eq_attr "type" "frdiv") + (and (eq_attr "mode" "DF") + (eq_attr "sb1_fp_pipes" "two")))) + "sb1_fp1 | sb1_fp0") + +(define_insn_reservation "ir_sb1_recipdf_1pipe" 20 + (and (eq_attr "cpu" "sb1") + (and (eq_attr "type" "frdiv") + (and (eq_attr "mode" "DF") + (eq_attr "sb1_fp_pipes" "one")))) + "sb1_fp1") + ;; ??? Can deliver at most 1 result per every 7 cycles because of issue ;; restrictions. diff --git a/gcc/config/mips/sr71k.md b/gcc/config/mips/sr71k.md index f1ce973b335..d40e27e8cda 100644 --- a/gcc/config/mips/sr71k.md +++ b/gcc/config/mips/sr71k.md @@ -278,14 +278,14 @@ (define_insn_reservation "ir_sr70_fdiv_sf" 60 (and (eq_attr "cpu" "sr71000") - (and (eq_attr "type" "fdiv") + (and (eq_attr "type" "fdiv,frdiv") (eq_attr "mode" "SF"))) "rf_multi1+(fpu_iter*51)") (define_insn_reservation "ir_sr70_fdiv_df" 120 (and (eq_attr "cpu" "sr71000") - (and (eq_attr "type" "fdiv") + (and (eq_attr "type" "fdiv,frdiv") (eq_attr "mode" "DF"))) "rf_multi1+(fpu_iter*109)")