From: lkcl <lkcl@web>
Date: Wed, 8 Sep 2021 00:28:33 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~186
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a0201956b63ec27dd15caf45cd03b4f1d4c07787;p=libreriscv.git

---

diff --git a/openpower/sv/cr_ops.mdwn b/openpower/sv/cr_ops.mdwn
index 601a9bb28..4167096e1 100644
--- a/openpower/sv/cr_ops.mdwn
+++ b/openpower/sv/cr_ops.mdwn
@@ -19,14 +19,15 @@ this section.
 
 Other modes are still applicable and include:
 
-* Data-dependent fail-first
-* Scalar and parallel reduction
-* Predicate-result
-
-Data-dependent Fail-first is useful to truncate VL based on
-analysis of a Condition Register result bit.  Reduction is useful
+* **Data-dependent fail-first**.
+  useful to truncate VL based on
+  analysis of a Condition Register result bit.
+* **Scalar and parallel reduction**.
+  Reduction is useful
 for turning a Vector of Condition Register Fields into one
-single Condition Register. Predicate-result is equivalent
+single Condition Register. 
+* **Predicate-result**.
+  Equivalent
 to python "filter", in that only elements which pass a test
 will end up actually being modified. This is in effect the same
 as ANDing the Condition Test with the destination predicate