From: Eric Anholt <eric@anholt.net>
Date: Thu, 19 May 2011 18:02:14 +0000 (-0700)
Subject: i965: Use 3D clears on gen6+ to avoid inter-ring synchronization.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a0e5affb22da50aeb30262f5ba0912b059d858ea;p=mesa.git

i965: Use 3D clears on gen6+ to avoid inter-ring synchronization.

Improves firefox-talos-gfx around 5%.
---

diff --git a/src/mesa/drivers/dri/intel/intel_clear.c b/src/mesa/drivers/dri/intel/intel_clear.c
index 81c062fba53..76d33f9b37e 100644
--- a/src/mesa/drivers/dri/intel/intel_clear.c
+++ b/src/mesa/drivers/dri/intel/intel_clear.c
@@ -116,13 +116,13 @@ intelClear(struct gl_context *ctx, GLbitfield mask)
    }
 
    /* HW color buffers (front, back, aux, generic FBO, etc) */
-   if (colorMask == ~0) {
+   if (intel->gen < 6 && colorMask == ~0) {
       /* clear all R,G,B,A */
       blit_mask |= (mask & BUFFER_BITS_COLOR);
    }
    else {
       /* glColorMask in effect */
-      tri_mask |= (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT));
+      tri_mask |= (mask & BUFFER_BITS_COLOR);
    }
 
    /* Make sure we have up to date buffers before we start looking at