From: Marcus Nilsson Date: Mon, 4 Jul 2022 10:25:42 +0000 (+0100) Subject: opcodes/avr: Implement style support in the disassembler X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a0f3a4c646cce619b6c5392b4ec8dcceeb5729ba;p=binutils-gdb.git opcodes/avr: Implement style support in the disassembler * disassemble.c: (disassemble_init_for_target): Set created_styled_output for AVR based targets. * avr-dis.c: (print_insn_avr): Use fprintf_styled_ftype instead of fprintf_ftype throughout. (avr_operand): Pass in and fill disassembler_style when parsing operands. --- diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 3d9f4a14532..c51b1734e20 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,12 @@ +2022-07-04 Marcus Nilsson + + * disassemble.c: (disassemble_init_for_target): Set + created_styled_output for AVR based targets. + * avr-dis.c: (print_insn_avr): Use fprintf_styled_ftype + instead of fprintf_ftype throughout. + (avr_operand): Pass in and fill disassembler_style when + parsing operands. + 2022-04-07 Andreas Krebbel * s390-mkopc.c (main): Enable z16 as CPU string in the opcode diff --git a/opcodes/avr-dis.c b/opcodes/avr-dis.c index aab37962688..7e5d4d520e7 100644 --- a/opcodes/avr-dis.c +++ b/opcodes/avr-dis.c @@ -56,6 +56,7 @@ avr_operand (unsigned int insn, char * opcode_str, char * buf, char * comment, + enum disassembler_style * style, int regs, int * sym, bfd_vma * sym_addr, @@ -74,6 +75,7 @@ avr_operand (unsigned int insn, insn = (insn & 0x01f0) >> 4; /* Destination register. */ sprintf (buf, "r%d", insn); + *style = dis_style_register; break; case 'd': @@ -81,10 +83,12 @@ avr_operand (unsigned int insn, sprintf (buf, "r%d", 16 + (insn & 0xf)); else sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4)); + *style = dis_style_register; break; case 'w': sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3)); + *style = dis_style_register; break; case 'a': @@ -92,6 +96,7 @@ avr_operand (unsigned int insn, sprintf (buf, "r%d", 16 + (insn & 7)); else sprintf (buf, "r%d", 16 + ((insn >> 4) & 7)); + *style = dis_style_register; break; case 'v': @@ -99,6 +104,7 @@ avr_operand (unsigned int insn, sprintf (buf, "r%d", (insn & 0xf) * 2); else sprintf (buf, "r%d", ((insn & 0xf0) >> 3)); + *style = dis_style_register; break; case 'e': @@ -123,6 +129,7 @@ avr_operand (unsigned int insn, if (AVR_UNDEF_P (insn)) sprintf (comment, _("undefined")); } + *style = dis_style_register; break; case 'z': @@ -143,6 +150,7 @@ avr_operand (unsigned int insn, *buf = '\0'; if (AVR_UNDEF_P (insn)) sprintf (comment, _("undefined")); + *style = dis_style_register; break; case 'b': @@ -159,6 +167,7 @@ avr_operand (unsigned int insn, *buf++ = 'Z'; sprintf (buf, "+%d", x); sprintf (comment, "0x%02x", x); + *style = dis_style_register; } break; @@ -173,6 +182,7 @@ avr_operand (unsigned int insn, info->insn_info_valid = 1; info->insn_type = dis_jsr; info->target = *sym_addr; + *style = dis_style_address; break; case 'L': @@ -185,6 +195,7 @@ avr_operand (unsigned int insn, info->insn_info_valid = 1; info->insn_type = dis_branch; info->target = *sym_addr; + *style = dis_style_address_offset; } break; @@ -199,6 +210,7 @@ avr_operand (unsigned int insn, info->insn_info_valid = 1; info->insn_type = dis_condbranch; info->target = *sym_addr; + *style = dis_style_address_offset; } break; @@ -209,6 +221,7 @@ avr_operand (unsigned int insn, *sym_addr = val; sprintf (buf, "0x%04X", insn2); strcpy (comment, comment_start); + *style = dis_style_immediate; } break; @@ -222,12 +235,14 @@ avr_operand (unsigned int insn, *sym_addr = val | 0x800000; sprintf (buf, "0x%02x", val); strcpy (comment, comment_start); + *style = dis_style_immediate; } break; case 'M': sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf)); sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf)); + *style = dis_style_immediate; break; case 'n': @@ -235,6 +250,7 @@ avr_operand (unsigned int insn, /* xgettext:c-format */ opcodes_error_handler (_("internal disassembler error")); ok = 0; + *style = dis_style_immediate; break; case 'K': @@ -244,15 +260,18 @@ avr_operand (unsigned int insn, x = (insn & 0xf) | ((insn >> 2) & 0x30); sprintf (buf, "0x%02x", x); sprintf (comment, "%d", x); + *style = dis_style_immediate; } break; case 's': sprintf (buf, "%d", insn & 7); + *style = dis_style_immediate; break; case 'S': sprintf (buf, "%d", (insn >> 4) & 7); + *style = dis_style_immediate; break; case 'P': @@ -263,6 +282,7 @@ avr_operand (unsigned int insn, x |= (insn >> 5) & 0x30; sprintf (buf, "0x%02x", x); sprintf (comment, "%d", x); + *style = dis_style_address; } break; @@ -273,11 +293,13 @@ avr_operand (unsigned int insn, x = (insn >> 3) & 0x1f; sprintf (buf, "0x%02x", x); sprintf (comment, "%d", x); + *style = dis_style_address; } break; case 'E': sprintf (buf, "%d", (insn >> 4) & 15); + *style = dis_style_immediate; break; case '?': @@ -323,12 +345,13 @@ print_insn_avr (bfd_vma addr, disassemble_info *info) const struct avr_opcodes_s *opcode; static unsigned int *maskptr; void *stream = info->stream; - fprintf_ftype prin = info->fprintf_func; + fprintf_styled_ftype prin = info->fprintf_styled_func; static unsigned int *avr_bin_masks; static int initialized; int cmd_len = 2; int ok = 0; char op1[20], op2[20], comment1[40], comment2[40]; + enum disassembler_style style_op1, style_op2; int sym_op1 = 0, sym_op2 = 0; bfd_vma sym_addr1, sym_addr2; @@ -400,6 +423,8 @@ print_insn_avr (bfd_vma addr, disassemble_info *info) op2[0] = 0; comment1[0] = 0; comment2[0] = 0; + style_op1 = dis_style_text; + style_op2 = dis_style_text; if (opcode->name) { @@ -421,12 +446,14 @@ print_insn_avr (bfd_vma addr, disassemble_info *info) int regs = REGISTER_P (*constraints); ok = avr_operand (insn, insn2, addr, *constraints, opcode_str, op1, - comment1, 0, &sym_op1, &sym_addr1, info); + comment1, &style_op1, 0, &sym_op1, &sym_addr1, + info); if (ok && *(++constraints) == ',') ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str, - op2, *comment1 ? comment2 : comment1, regs, - &sym_op2, &sym_addr2, info); + op2, *comment1 ? comment2 : comment1, + &style_op2, regs, &sym_op2, &sym_addr2, + info); } } @@ -439,22 +466,26 @@ print_insn_avr (bfd_vma addr, disassemble_info *info) comment2[0] = 0; } - (*prin) (stream, "%s", ok ? opcode->name : ".word"); - + (*prin) (stream, ok ? dis_style_mnemonic : dis_style_assembler_directive, + "%s", ok ? opcode->name : ".word"); + if (*op1) - (*prin) (stream, "\t%s", op1); + (*prin) (stream, style_op1, "\t%s", op1); if (*op2) - (*prin) (stream, ", %s", op2); + { + (*prin) (stream, dis_style_text, ", "); + (*prin) (stream, style_op2, "%s", op2); + } if (*comment1) - (*prin) (stream, "\t; %s", comment1); + (*prin) (stream, dis_style_comment_start, "\t; %s", comment1); if (sym_op1) info->print_address_func (sym_addr1, info); if (*comment2) - (*prin) (stream, " %s", comment2); + (*prin) (stream, dis_style_comment_start, " %s", comment2); if (sym_op2) info->print_address_func (sym_addr2, info); diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c index 17cf6378890..9c0dacaf391 100644 --- a/opcodes/disassemble.c +++ b/opcodes/disassemble.c @@ -618,6 +618,11 @@ disassemble_init_for_target (struct disassemble_info * info) info->disassembler_needs_relocs = true; break; #endif +#ifdef ARCH_avr + case bfd_arch_avr: + info->created_styled_output = true; + break; +#endif #ifdef ARCH_csky case bfd_arch_csky: info->symbol_is_valid = csky_symbol_is_valid;