From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 26 Mar 2022 22:40:47 +0000 (+0000)
Subject: add clock output on hyperram sim
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a110edc4b7b18d1a8e4030ec63b58aaf4062f7b4;p=ls2.git

add clock output on hyperram sim
---

diff --git a/src/simsoc_hyperram_tb.v b/src/simsoc_hyperram_tb.v
index fcb2c25..5ae219d 100644
--- a/src/simsoc_hyperram_tb.v
+++ b/src/simsoc_hyperram_tb.v
@@ -113,6 +113,7 @@ s27kl0641
       $dumpvars(0, clkin);
       $dumpvars(0, o_resetn);
       $dumpvars(0, o_csn0);
+      $dumpvars(0, o_clk);
       $dumpvars(0, io_rwds);
       $dumpvars(0, io_dq);
       $dumpvars(0, uart_tx);