From: Yvan Roux Date: Wed, 17 Jul 2013 11:39:14 +0000 (+0000) Subject: re PR target/57909 ([ARM] ICE with internal memcpy and -mno-unaligned-access) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a1259a13026fb572411d29b13318264e2d087346;p=gcc.git re PR target/57909 ([ARM] ICE with internal memcpy and -mno-unaligned-access) Fix PR target/57909. 2013-07-17 Yvan Roux PR target/57909 * config/arm/arm.c (gen_movmem_ldrd_strd): Fix unaligned load/store usage in HI mode. From-SVN: r201005 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 60c176da0a9..58d44ff2ff3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2013-07-17 Yvan Roux + + PR target/57909 + * config/arm/arm.c (gen_movmem_ldrd_strd): Fix unaligned load/store + usage in HI mode. + 2013-07-17 Andreas Krebbel * config/s390/s390.c: (s390_expand_builtin): Allow -mhtm to be diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index e6fd42079cb..35096e83b20 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -12018,8 +12018,16 @@ gen_movmem_ldrd_strd (rtx *operands) dst = adjust_address (dst, HImode, 0); src = adjust_address (src, HImode, 0); reg0 = gen_reg_rtx (SImode); - emit_insn (gen_unaligned_loadhiu (reg0, src)); - emit_insn (gen_unaligned_storehi (dst, gen_lowpart (HImode, reg0))); + if (src_aligned) + emit_insn (gen_zero_extendhisi2 (reg0, src)); + else + emit_insn (gen_unaligned_loadhiu (reg0, src)); + + if (dst_aligned) + emit_insn (gen_movhi (dst, gen_lowpart(HImode, reg0))); + else + emit_insn (gen_unaligned_storehi (dst, gen_lowpart (HImode, reg0))); + src = next_consecutive_mem (src); dst = next_consecutive_mem (dst); if (len == 2)