From: Gabe Black <gblack@eecs.umich.edu>
Date: Tue, 20 Nov 2007 23:37:56 +0000 (-0800)
Subject: Simple CPU fix simple mistake in translateDataWriteAddr.
X-Git-Tag: m5_2.0_beta5~78
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a12d5975cc8ea9462c731f58c0a950a8d3e44409;p=gem5.git

Simple CPU fix simple mistake in translateDataWriteAddr.

--HG--
extra : convert_revision : 6a6a7d05f62d9d9868be0707e4dc186a5f7ecf7d
---

diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 9d7181cea..aead5aada 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -609,7 +609,7 @@ AtomicSimpleCPU::translateDataWriteAddr(Addr vaddr, Addr &paddr,
     dcache_latency = 0;
 
     while(1) {
-        req->setVirt(0, vaddr, flags, flags, thread->readPC());
+        req->setVirt(0, vaddr, dataSize, flags, thread->readPC());
 
         // translate to physical address
         Fault fault = thread->translateDataWriteReq(req);