From: Florent Kermarrec Date: Tue, 27 Jan 2015 22:46:15 +0000 (+0100) Subject: init repo X-Git-Tag: 24jan2021_ls180~2604^2~129 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a160b04d2f6747de2507ae6028318404197b3714;p=litex.git init repo --- a160b04d2f6747de2507ae6028318404197b3714 diff --git a/.gitignore b/.gitignore new file mode 100644 index 00000000..065c5521 --- /dev/null +++ b/.gitignore @@ -0,0 +1,3 @@ +__pycache__ +*.pyc +*.vcd diff --git a/LICENSE b/LICENSE new file mode 100644 index 00000000..95ac4a6a --- /dev/null +++ b/LICENSE @@ -0,0 +1,28 @@ +Unless otherwise noted, LiteScope is copyright (C) 2015 Florent Kermarrec. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. +2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +Other authors retain ownership of their contributions. If a submission can +reasonably be considered independently copyrightable, it's yours and we +encourage you to claim it with appropriate copyright notices. This submission +then falls under the "otherwise noted" category. All submissions are strongly +encouraged to use the two-clause BSD license reproduced above. diff --git a/README b/README new file mode 100644 index 00000000..224df3ca --- /dev/null +++ b/README @@ -0,0 +1,90 @@ + __ _ __ ______ __ __ + / / (_) /____ / __/ /_/ / ___ _______ ___ / /_ + / /__/ / __/ -_) _// __/ _ \/ -_) __/ _ \/ -_) __/ + /____/_/\__/\__/___/\__/_//_/\__/_/ /_//_/\__/\__/ + + Copyright 2012-2015 / EnjoyDigital + florent@enjoy-digital.fr + + A small footprint and configurable Ethernet core + developed by EnjoyDigital + +[> Intro +--------- +LiteEthernet provides a small footprint and configurable Ethernet core. + +LiteEthernet is part of LiteX libraries whose aims are to lower entry level of +complex FPGA IP cores by providing simple, elegant and efficient implementations +ofcomponents used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller... + +The core uses simple and specific streaming buses and will provides in the future +adapters to use standardized AXI or Avalon-ST streaming buses. + +Since Python is used to describe the HDL, the core is highly and easily +configurable. + +LiteEthernet uses technologies developed in partnership with M-Labs Ltd: + - Migen enables generating HDL with Python in an efficient way. + - MiSoC provides the basic blocks to build a powerful and small footprint SoC. + +LiteEthernet can be used as a Migen/MiSoC library (by simply installing it +with the provided setup.py) or can be integrated with your standard design flow +by generating the verilog rtl that you will use as a standard core. + +[> Features +----------- +- Ethernet MAC with various internface and various PHYs (GMII, MII, Loopback) + +[> Possibles improvements +------------------------- +- add standardized interfaces (AXI, Avalon-ST) +- add DMA interface to MAC +- add hardware ARP table +- add hardware IP layer +- add hardware UDP layer +- add hardware Etherbone support +- ... See below Support and Consulting :) + +If you want to support these features, please contact us at florent [AT] +enjoy-digital.fr. You can also contact our partner on the public mailing list +devel [AT] lists.m-labs.hk. + + +[> Getting started +------------------ + XXX + +[> Simulations: + XXX + +[> Tests : + XXX + +[> License +----------- +LiteEthernet is released under the very permissive two-clause BSD license. Under +the terms of this license, you are authorized to use LiteEthernet for closed-source +proprietary designs. +Even though we do not require you to do so, those things are awesome, so please +do them if possible: + - tell us that you are using LiteEthernet + - cite LiteEthernet in publications related to research it has helped + - send us feedback and suggestions for improvements + - send us bug reports when something goes wrong + - send us the modifications and improvements you have done to LiteEthernet. + +[> Support and Consulting +-------------------------- +We love open-source hardware and like sharing our designs with others. + +LiteEthernet is developed and maintained by EnjoyDigital. + +If you would like to know more about LiteEthernet or if you are already a happy +user and would like to extend it for your needs, EnjoyDigital can provide standard +commercial support as well as consulting services. + +So feel free to contact us, we'd love to work with you! (and eventually shorten +the list of the possible improvements :) + +[> Contact +E-mail: florent [AT] enjoy-digital.fr \ No newline at end of file diff --git a/liteethernet/__init__.py b/liteethernet/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/liteethernet/arp/__init__.py b/liteethernet/arp/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/liteethernet/etherbone/__init__.py b/liteethernet/etherbone/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/liteethernet/ip/__init__.py b/liteethernet/ip/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/liteethernet/mac/__init__.py b/liteethernet/mac/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/liteethernet/mac/core/__init__.py b/liteethernet/mac/core/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/liteethernet/mac/frontend/__init__.py b/liteethernet/mac/frontend/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/liteethernet/mac/phy/__init__.py b/liteethernet/mac/phy/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/liteethernet/udp/__init__.py b/liteethernet/udp/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/setup.py b/setup.py new file mode 100644 index 00000000..ca0e57d8 --- /dev/null +++ b/setup.py @@ -0,0 +1,37 @@ +#!/usr/bin/env python3 + +import sys, os +from setuptools import setup +from setuptools import find_packages + +here = os.path.abspath(os.path.dirname(__file__)) +README = open(os.path.join(here, "README")).read() + +required_version = (3, 3) +if sys.version_info < required_version: + raise SystemExit("LiteEthernet requires python {0} or greater".format( + ".".join(map(str, required_version)))) + +setup( + name="liteethernet", + version="unknown", + description="small footprint and configurable embedded FPGA logic analyzer", + long_description=README, + author="Florent Kermarrec", + author_email="florent@enjoy-digital.fr", + url="http://enjoy-digital.fr", + download_url="https://github.com/enjoy-digital/liteethernet", + packages=find_packages(here), + license="GPL", + platforms=["Any"], + keywords="HDL ASIC FPGA hardware design", + classifiers=[ + "Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)", + "Environment :: Console", + "Development Status :: Alpha", + "Intended Audience :: Developers", + "License :: OSI Approved :: GNU General Public License (GPL)", + "Operating System :: OS Independent", + "Programming Language :: Python", + ], +) diff --git a/targets/__init__.py b/targets/__init__.py new file mode 100644 index 00000000..e69de29b