From: lkcl <lkcl@web>
Date: Sun, 25 Sep 2022 09:00:50 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~287
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a161010e5a13f2eb7bdcf9361dcc3b17209a6ee3;p=libreriscv.git

---

diff --git a/openpower/sv/overview/discussion.mdwn b/openpower/sv/overview/discussion.mdwn
index 843042461..ec3104123 100644
--- a/openpower/sv/overview/discussion.mdwn
+++ b/openpower/sv/overview/discussion.mdwn
@@ -214,6 +214,9 @@ We start with some definitions:
 
 * bit-ordering below is in MSB0 order, prefix "b"
 * byte-ordering is in MSB0 order, prefix "B"
+* halfword-ordering is in MSB0 order, prefix "H"
+* word-ordering is in MSB0 order, prefix "W"
+* doubleword-ordering is in MSB0 order, prefix "D"
 * register-numbering is in **LSB0** order, prefix "r"
 * element-numbering is in **LSB0** order, prefix "e"