From: Luke Kenneth Casson Leighton Date: Wed, 17 Oct 2018 00:58:15 +0000 (+0100) Subject: minor alteration to CSRRWI SETVL / SETMVL to offset immediate by 1 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a161d1b9d4db96d1b6ce2fec7b66325d9144a08b;p=riscv-isa-sim.git minor alteration to CSRRWI SETVL / SETMVL to offset immediate by 1 allows CSRRWI to make maximum use of only 5-bit immediate --- diff --git a/riscv/insns/csrrwi.h b/riscv/insns/csrrwi.h index 8a253ee..69c5472 100644 --- a/riscv/insns/csrrwi.h +++ b/riscv/insns/csrrwi.h @@ -6,10 +6,12 @@ reg_t old = 0; // stop compiler bitchin if (csr != CSR_USVVL && csr != CSR_USVMVL) { old = p->get_csr(csr); + p->set_csr(csr, insn.rs1()); } -p->set_csr(csr, insn.rs1()); +else if (csr == CSR_USVVL || csr == CSR_USVMVL) { + p->set_csr(csr, insn.rs1()+1); // must add one here old = p->get_csr(csr); } #else diff --git a/riscv/processor.cc b/riscv/processor.cc index 5b73dcc..b95c030 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -344,18 +344,20 @@ void processor_t::set_csr(int which, reg_t val) { #ifdef SPIKE_SIMPLEV case CSR_USVMVL: - state.mvl = std::min(val+1, (uint64_t)64); // limited to XLEN width + state.mvl = std::min(val, (uint64_t)64); // limited to XLEN width + // TODO XXX throw exception if val == 0 fprintf(stderr, "set MVL %lx\n", state.mvl); break; case CSR_USVSTATE: // bits 0-5: mvl - 6-11: vl - 12-17: srcoffs - 18-23: destoffs - set_csr(CSR_USVMVL, get_field(val, 0x1f)); - set_csr(CSR_USVVL , get_field(val, 0x1f<<6)); - state.srcoffs = std::min(get_field(val, 0x1f<<12), state.vl-1); + set_csr(CSR_USVMVL, get_field(val, 0x1f )+1); + set_csr(CSR_USVVL , get_field(val, 0x1f<<6)+1); + state.srcoffs = std::min(get_field(val, 0x1f<<12), state.vl-1); state.destoffs = std::min(get_field(val, 0x1f<<18), state.vl-1); break; case CSR_USVVL: - state.vl = std::min(state.mvl, val+1); + state.vl = std::min(state.mvl, val); + // TODO XXX throw exception if val == 0 fprintf(stderr, "set VL %lx\n", state.vl); break; case CSR_SVREGCFG0: