From: George Kyriazis <george.kyriazis@intel.com>
Date: Tue, 13 Mar 2018 01:34:19 +0000 (-0500)
Subject: swr/rast: LLVM 6 fix
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a16f8e05547404f13f5a655b58effe0a5512dc50;p=mesa.git

swr/rast: LLVM 6 fix

for getting masked gather intrinsic (also compatible with LLVM 4)

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
---

diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp b/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp
index 278113e44fb..cc0f897e486 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp
@@ -390,7 +390,7 @@ namespace SwrJit
     /// @param pVecPassthru - SIMD wide vector of values to load when lane is inactive
     Value* Builder::GATHER_PTR(Value* pVecSrcPtr, Value* pVecMask, Value* pVecPassthru)
     {
-        Function* pMaskedGather = llvm::Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::masked_gather, { pVecPassthru->getType() });
+        Function* pMaskedGather = llvm::Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::masked_gather, { pVecPassthru->getType(), pVecSrcPtr->getType() });
 
         return CALL(pMaskedGather, { pVecSrcPtr, C(0), pVecMask, pVecPassthru });
     }