From: Luke Kenneth Casson Leighton Date: Fri, 19 Oct 2018 23:37:59 +0000 (+0100) Subject: whoops load_uint64 with auto returned sv_reg_t not uint64_t X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a18ab66ad75d3da255880b2c89439786c95857ae;p=riscv-isa-sim.git whoops load_uint64 with auto returned sv_reg_t not uint64_t --- diff --git a/riscv/sim.cc b/riscv/sim.cc index de57edf..242c9ff 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -218,7 +218,7 @@ void sim_t::idle() void sim_t::read_chunk(addr_t taddr, size_t len, void* dst) { assert(len == 8); - auto data = debug_mmu->load_uint64(taddr); + uint64_t data = debug_mmu->load_uint64(taddr); memcpy(dst, &data, sizeof data); }