From: Aurelien Jarno Date: Thu, 21 Jul 2016 08:27:47 +0000 (+0000) Subject: [ARM] Fix PR target/59833 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a1b01d34036c85f23b7ca1a2c99e5b6bb0b8e68c;p=gcc.git [ARM] Fix PR target/59833 For Aurelien Jarno On ARM soft-float, the float to double conversion doesn't convert a sNaN to qNaN as the IEEE Std 754 standard mandates: "Under default exception handling, any operation signaling an invalid operation exception and for which a floating-point result is to be delivered shall deliver a quiet NaN." Given the soft float ARM code ignores exceptions and always provides a result, a float to double conversion of a signaling NaN should return a quiet NaN. Fix this in extendsfdf2. gcc/ChangeLog: PR target/59833 * config/arm/ieee754-df.S (extendsfdf2): Convert sNaN to qNaN. gcc/testsuite/ChangeLog: * gcc.dg/pr59833.c: New testcase. From-SVN: r238584 --- diff --git a/gcc/testsuite/gcc.dg/pr59833.c b/gcc/testsuite/gcc.dg/pr59833.c new file mode 100644 index 00000000000..e0e4ed5c5cc --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr59833.c @@ -0,0 +1,18 @@ +/* { dg-do run { target { *-*-linux* *-*-gnu* } } } */ +/* { dg-options "-O0 -lm" } */ +/* { dg-require-effective-target issignaling } */ + +#define _GNU_SOURCE +#include + +int main (void) +{ + float sNaN = __builtin_nansf (""); + double x = (double) sNaN; + if (issignaling(x)) + { + __builtin_abort(); + } + + return 0; +} diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index f2d7114cb49..f3e9104f896 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,8 @@ +2016-07-21 Aurelien Jarno + + PR target/59833 + * config/arm/ieee754-df.S (extendsfdf2): Convert sNaN to qNaN. + 2016-07-19 Nick Clifton * config.host (m32r): Add m32r/t-m32r to tmake_file. diff --git a/libgcc/config/arm/ieee754-df.S b/libgcc/config/arm/ieee754-df.S index a2aac702e6c..1ecaa9dac20 100644 --- a/libgcc/config/arm/ieee754-df.S +++ b/libgcc/config/arm/ieee754-df.S @@ -507,11 +507,15 @@ ARM_FUNC_ALIAS aeabi_f2d extendsfdf2 eorne xh, xh, #0x38000000 @ fixup exponent otherwise. RETc(ne) @ and return it. - teq r2, #0 @ if actually 0 - do_it ne, e - teqne r3, #0xff000000 @ or INF or NAN + bics r2, r2, #0xff000000 @ isolate mantissa + do_it eq @ if 0, that is ZERO or INF, RETc(eq) @ we are done already. + teq r3, #0xff000000 @ check for NAN + do_it eq, t + orreq xh, xh, #0x00080000 @ change to quiet NAN + RETc(eq) @ and return it. + @ value was denormalized. We can normalize it now. do_push {r4, r5, lr} .cfi_adjust_cfa_offset 12 @ CFA is now sp + previousOffset + 12