From: Jacob Lifshay <programmerjake@gmail.com>
Date: Thu, 24 Aug 2023 05:36:27 +0000 (-0700)
Subject: add important clarification of #1033
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a1ba910b1ac26158648b69d5cbd7556d9be3a6ef;p=libreriscv.git

add important clarification of #1033
---

diff --git a/nlnet_2022_ongoing/discussion.mdwn b/nlnet_2022_ongoing/discussion.mdwn
index dda5edc4e..51c4c07a4 100644
--- a/nlnet_2022_ongoing/discussion.mdwn
+++ b/nlnet_2022_ongoing/discussion.mdwn
@@ -42,6 +42,11 @@ Cesar likely do the former, Jacob could do the latter.
 ### Bug 1033
 
 * Create the framework for testing (or choose existing)
+  (jacob: important clarification -- afaict this task is adding new `StateRunner`
+  and `State` subclasses for FPGA/verilator/etc.
+  This task is *not* for creating a new framework or choosing an existing framework,
+  we already have one with implementations for pypowersim, nmigen simulation of the
+  libre-soc core, and `ExpectedState`. maybe also QEMU through GDB, icr.)
 * Add specialisation for pypowersim, microwatt (verilator), FPGA.
 * Cavatools out of scope.
 * Builds on top of <https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/test/state.py;hb=c23202498ae30addf04ab4c1e0d7262cc825cd45>?