From: Segher Boessenkool Date: Tue, 2 Oct 2018 14:19:49 +0000 (+0200) Subject: rs6000: Fix vec-init-6.c (PR87081) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a1c3d798efbf20497bfb6584c9a780dc24996ee1;p=gcc.git rs6000: Fix vec-init-6.c (PR87081) Since a while we use a rldimi instead of rldicl/rldicr/or to combine two words to one. PR target/87081 * gcc.target/powerpc/vec-init-6.c: Fix expected asm. From-SVN: r264789 --- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3a906bff938..6f7b577b86a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-10-02 Segher Boessenkool + + PR target/87081 + * gcc.target/powerpc/vec-init-6.c: Fix expected asm. + 2018-10-01 Martin Sebor * gcc.dg/warn-strnlen-no-nul.c: New. diff --git a/gcc/testsuite/gcc.target/powerpc/vec-init-6.c b/gcc/testsuite/gcc.target/powerpc/vec-init-6.c index 8d610e158cc..f574da3000f 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-init-6.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-init-6.c @@ -9,8 +9,7 @@ merge (int a, int b, int c, int d) return (vector int) { a, b, c, d }; } -/* { dg-final { scan-assembler "rldicr" } } */ -/* { dg-final { scan-assembler "rldicl" } } */ +/* { dg-final { scan-assembler-times {\mrldi} 2 } } */ /* { dg-final { scan-assembler "mtvsrd" } } */ /* { dg-final { scan-assembler-not "stw" } } */ /* { dg-final { scan-assembler-not "lxvw4x" } } */