From: lkcl <lkcl@web>
Date: Sat, 30 Apr 2022 17:53:09 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2533
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a201802bb89b0f9f6b1fddc949c087e79509f9f6;p=libreriscv.git

---

diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn
index d8638460f..37bfcd006 100644
--- a/openpower/sv/svp64/appendix.mdwn
+++ b/openpower/sv/svp64/appendix.mdwn
@@ -1053,7 +1053,7 @@ is best illustrated in pseudocode:
            src2 = get_polymorphed_reg(RC, srcwid, irs3)
            result = src1*src2 + src2
            destmask = (2<<destwid)-1
-           # store two halves of result
+           # store two halves of result, both start from RT.
            set_polymorphed_reg(RT, destwid, ird      , result&destmask)
            set_polymorphed_reg(RT, destwid, ird+MAXVL, result>>destwid)
            if (!RT.isvec) break
@@ -1064,7 +1064,20 @@ is best illustrated in pseudocode:
 
 The significant part here is that the second half is stored
 starting not from RT+MAXVL at all: it is the *element* index
-that is offset by MAXVL, both starting from RT.
+that is offset by MAXVL, both halves actually starting from RT.
+If VL is 3, MAXVL is 5, RT is 1, and dest elwidth is 32 then the elements
+RT0 to RT2 are stored:
+
+         0..31     32..63
+     r0  unchanged unchanged
+     r1  RT0.lo    RT1.lo
+     r2  RT2.lo    unchanged
+     r3  unchanged RT0.hi
+     r4  RT1.hi    RT2.hi
+     r5 unchanged  unchanged
+
+Additional DRAFT Scalar instructions in 3-in 2-out form
+with an implicit 2nd destination:
 
 * [[isa/svfixedarith]]
 * [[isa/svfparith]]