From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 31 Jul 2018 06:37:47 +0000 (+0100)
Subject: write mux width and read back in
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a22060150434ffa88cc7b977d24c3cef26940da7;p=pinmux.git

write mux width and read back in
---

diff --git a/src/parse.py b/src/parse.py
index 6ab3dd0..12e20ca 100644
--- a/src/parse.py
+++ b/src/parse.py
@@ -25,14 +25,18 @@ class Parse(object):
         self.dedicated_cells = []
         self.pinnumbers = []
         self.bankwidths = {} 
+        self.banksize = {}
+        self.bankstart = {}
 
-        fname = 'bankwidths.txt'
+        fname = 'pinspec.txt'
         if pth:
             fname = os.path.join(pth, fname)
         with open(fname) as bankwidths:
             for lineno, line in enumerate(bankwidths):
                 line1 = line[:-1].split('\t')
-                self.bankwidths[line1[0]] = int(line1[1])
+                self.bankwidths[line1[0]] = int(line1[3])
+                self.banksize[line1[0]] = int(line1[2])
+                self.bankstart[line1[0]] = int(line1[1])
             
         # == capture the number of IO cells required == #
         fname = 'pinmap.txt'
diff --git a/src/pinmux_generator.py b/src/pinmux_generator.py
index 2f04f34..b95377b 100644
--- a/src/pinmux_generator.py
+++ b/src/pinmux_generator.py
@@ -91,7 +91,7 @@ if __name__ == '__main__':
                 dummytest(ps, output_dir, output_type)
             else:
                 specgen(of, output_dir, pinout,
-                        bankspec, pinspec, fixedpins, ps.fastbus)
+                        bankspec, ps.muxwidths, pinspec, fixedpins, ps.fastbus)
     else:
         if output_type == 'bsv':
             from bsv.pinmux_generator import pinmuxgen as gentypes
diff --git a/src/spec/gen.py b/src/spec/gen.py
index 8a54e93..e1dc561 100644
--- a/src/spec/gen.py
+++ b/src/spec/gen.py
@@ -3,7 +3,8 @@ import os.path
 from spec.interfaces import Pinouts
 
 
-def specgen(of, pth, pinouts, bankspec, pinbanks, fixedpins, fastbus):
+def specgen(of, pth, pinouts, bankspec, muxwidths, pinbanks, fixedpins,
+            fastbus):
     """ generates a specification of pinouts (tsv files)
         for reading in by pinmux.
 
@@ -28,7 +29,7 @@ def specgen(of, pth, pinouts, bankspec, pinbanks, fixedpins, fastbus):
     #print pinouts.ganged.items()
     if not os.path.exists(pth):
         os.makedirs(pth)
-    with open(os.path.join(pth, 'bankwidths.txt'), 'w') as f:
+    with open(os.path.join(pth, 'muxwidths.txt'), 'w') as f:
         for k, v in pinouts.muxwidths.items():
             f.write("%s\t%d\n" % (k, v))
     with open(os.path.join(pth, 'interfaces.txt'), 'w') as f:
@@ -93,5 +94,6 @@ def specgen(of, pth, pinouts, bankspec, pinbanks, fixedpins, fastbus):
         keys = sorted(bankspec.keys())
         for bank in keys:
             pinstart = bankspec[bank]
-            of.write("* %s %d %d\n" % (bank, pinstart, pinbanks[bank]))
-            g.write("%s\t%d\t%d\n" % (bank, pinstart, pinbanks[bank]))
+            wid = muxwidths[bank]
+            of.write("* %s %d %d %d\n" % (bank, pinstart, pinbanks[bank], wid))
+            g.write("%s\t%d\t%d\t%d\n" % (bank, pinstart, pinbanks[bank], wid))