From: Changpeng Fang Date: Fri, 2 Jul 2010 16:34:29 +0000 (+0000) Subject: PR 44576: miss rate computation improvement for prefetching loop arrays. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a245c04bccad9eea35cf21def68ae812fd29a953;p=gcc.git PR 44576: miss rate computation improvement for prefetching loop arrays. 2010-07-02 Changpeng Fang PR middle-end/44576 * tree-ssa-loop-prefetch.c (compute_miss_rate): Return 1000 (out of 1000) for miss rate if the address diference is greater than or equal to the cache line size (the two reference will never hit the same cache line). From-SVN: r161727 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bd7b258b499..7e7944a6618 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2010-07-02 Changpeng Fang + + PR middle-end/44576 + * tree-ssa-loop-prefetch.c (compute_miss_rate): Return 1000 (out + of 1000) for miss rate if the address diference is greater than or + equal to the cache line size (the two reference will never hit the + same cache line). + 2010-07-02 Bernd Schmidt PR target/42835 diff --git a/gcc/tree-ssa-loop-prefetch.c b/gcc/tree-ssa-loop-prefetch.c index 65474898ad9..934b49c0406 100644 --- a/gcc/tree-ssa-loop-prefetch.c +++ b/gcc/tree-ssa-loop-prefetch.c @@ -654,6 +654,11 @@ compute_miss_rate (unsigned HOST_WIDE_INT cache_line_size, int total_positions, miss_positions, miss_rate; int address1, address2, cache_line1, cache_line2; + /* It always misses if delta is greater than or equal to the cache + line size. */ + if (delta >= cache_line_size) + return 1000; + total_positions = 0; miss_positions = 0;