From: Tobias Platen Date: Sun, 9 May 2021 18:57:31 +0000 (+0200) Subject: src/soc/fu/ldst/loadstore.py drive output d_in.valid X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a2733e9b90e53d794281bc89c5048a8d8f0d9ad0;p=soc.git src/soc/fu/ldst/loadstore.py drive output d_in.valid --- diff --git a/src/soc/fu/ldst/loadstore.py b/src/soc/fu/ldst/loadstore.py index 77e11a6a..2e2046bf 100644 --- a/src/soc/fu/ldst/loadstore.py +++ b/src/soc/fu/ldst/loadstore.py @@ -193,7 +193,7 @@ class LoadStore1(PortInterfaceBase): pass with m.Case(State.COMPLETE): pass - + # microwatt: only if State.ACK_WAIZ with m.If(d_out.error): with m.If(d_out.cache_paradox): sync += self.derror.eq(1) @@ -252,6 +252,7 @@ class LoadStore1(PortInterfaceBase): m.d.comb += d_in.byte_sel.eq(self.byte_sel) m.d.comb += d_in.addr.eq(self.addr) m.d.comb += d_in.nc.eq(self.nc) + m.d.comb += d_in.valid.eq(self.mmureq) m.d.comb += self.done.eq(d_out.valid) m.d.comb += self.load_data.eq(d_out.data)