From: Marek Olšák <maraeo@gmail.com>
Date: Tue, 12 Jan 2010 22:23:05 +0000 (+0100)
Subject: Revert "r300g: Placate kernel checker by explicitly disabling depth test."
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a2926a2a8bbd72b6b78adf88478aa02c9624b289;p=mesa.git

Revert "r300g: Placate kernel checker by explicitly disabling depth test."

This reverts commit e920ee23b32f6031a7b8527b540566e7ada6af8a.

Assuming the FB state is not dirty and the DSA state is, then the depth test
will be re-enabled, making the kernel checker angry. Reverting the commit
fixes piglit/glsl-bug-22603.
---

diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c
index 2f5df6a00a5..559651de646 100644
--- a/src/gallium/drivers/r300/r300_emit.c
+++ b/src/gallium/drivers/r300/r300_emit.c
@@ -122,8 +122,15 @@ void r300_emit_dsa_state(struct r300_context* r300, void* state)
     }*/
 
     OUT_CS_REG_SEQ(R300_ZB_CNTL, 3);
-    OUT_CS(dsa->z_buffer_control);
-    OUT_CS(dsa->z_stencil_control);
+
+    if (r300->framebuffer_state.zsbuf) {
+        OUT_CS(dsa->z_buffer_control);
+        OUT_CS(dsa->z_stencil_control);
+    } else {
+        OUT_CS(0);
+        OUT_CS(0);
+    }
+
     OUT_CS(dsa->stencil_ref_mask);
 
     /* XXX it seems r3xx doesn't support STENCILREFMASK_BF */
@@ -388,7 +395,7 @@ void r300_emit_fb_state(struct r300_context* r300,
     assert(fb->nr_cbufs <= 4);
 
     BEGIN_CS((10 * fb->nr_cbufs) + (2 * (4 - fb->nr_cbufs)) +
-             (fb->zsbuf ? 10 : 3) + 6);
+             (fb->zsbuf ? 10 : 0) + 6);
 
     /* Flush and free renderbuffer caches. */
     OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT,
@@ -424,7 +431,7 @@ void r300_emit_fb_state(struct r300_context* r300,
         OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), R300_US_OUT_FMT_UNUSED);
     }
 
-    /* Set up the Z/stencil buffer, or disable it. */
+    /* Set up a zbuffer. */
     if (fb->zsbuf) {
         surf = fb->zsbuf;
         tex = (struct r300_texture*)surf->texture;
@@ -438,10 +445,6 @@ void r300_emit_fb_state(struct r300_context* r300,
         OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1);
         OUT_CS_RELOC(tex->buffer, tex->pitch[surf->level], 0,
                      RADEON_GEM_DOMAIN_VRAM, 0);
-    } else {
-        OUT_CS_REG_SEQ(R300_ZB_CNTL, 2);
-        OUT_CS(0x0);
-        OUT_CS(0x0);
     }
 
     END_CS;