From: Gabe Black Date: Mon, 14 Oct 2019 22:31:26 +0000 (-0700) Subject: cpu: Access inst events through ThreadContext instead of the CPU. X-Git-Tag: v19.0.0.0~401 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a2a8dac5c2a26e91432415f409b55f04cff9c2e4;p=gem5.git cpu: Access inst events through ThreadContext instead of the CPU. Also delete the CPU interface. Change-Id: I62a6b0a9a303d672f4083bdedf393f9f6d07331f Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22109 Reviewed-by: Andreas Sandberg Maintainer: Andreas Sandberg Tested-by: kokoro --- diff --git a/src/base/remote_gdb.cc b/src/base/remote_gdb.cc index b45ef1037..9a1f7bf2b 100644 --- a/src/base/remote_gdb.cc +++ b/src/base/remote_gdb.cc @@ -753,18 +753,16 @@ BaseRemoteGDB::setTempBreakpoint(Addr bkpt) void BaseRemoteGDB::scheduleInstCommitEvent(Event *ev, int delta) { - auto *cpu = tc->getCpuPtr(); // Here "ticks" aren't simulator ticks which measure time, they're // instructions committed by the CPU. - cpu->scheduleInstCountEvent(tc->threadId(), ev, - cpu->getCurrentInstCount(tc->threadId()) + delta); + tc->scheduleInstCountEvent(ev, tc->getCurrentInstCount() + delta); } void BaseRemoteGDB::descheduleInstCommitEvent(Event *ev) { if (ev->scheduled()) - tc->getCpuPtr()->descheduleInstCountEvent(tc->threadId(), ev); + tc->descheduleInstCountEvent(ev); } std::map BaseRemoteGDB::command_map = { diff --git a/src/cpu/base.cc b/src/cpu/base.cc index 7040cb7ea..e8927dfcd 100644 --- a/src/cpu/base.cc +++ b/src/cpu/base.cc @@ -314,8 +314,8 @@ BaseCPU::init() *counter = numThreads; for (ThreadID tid = 0; tid < numThreads; ++tid) { Event *event = new CountedExitEvent(cause, *counter); - scheduleInstCountEvent( - tid, event, params()->max_insts_all_threads); + threadContexts[tid]->scheduleInstCountEvent( + event, params()->max_insts_all_threads); } } @@ -725,7 +725,7 @@ BaseCPU::scheduleInstStop(ThreadID tid, Counter insts, const char *cause) const Tick now(getCurrentInstCount(tid)); Event *event(new LocalSimLoopExitEvent(cause, 0)); - scheduleInstCountEvent(tid, event, now + insts); + threadContexts[tid]->scheduleInstCountEvent(event, now + insts); } Tick diff --git a/src/cpu/base.hh b/src/cpu/base.hh index d73f4a2d5..cb23cb1ba 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -465,30 +465,6 @@ class BaseCPU : public ClockedObject */ uint64_t getCurrentInstCount(ThreadID tid); - Tick - nextInstEventCount(ThreadID tid) - { - return threadContexts[tid]->nextInstEventCount(); - } - - void - serviceInstCountEvents(ThreadID tid, Tick count) - { - threadContexts[tid]->serviceInstCountEvents(count); - } - - void - scheduleInstCountEvent(ThreadID tid, Event *event, Tick count) - { - threadContexts[tid]->scheduleInstCountEvent(event, count); - } - - void - descheduleInstCountEvent(ThreadID tid, Event *event) - { - threadContexts[tid]->descheduleInstCountEvent(event); - } - public: /** * @{ diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc index 384abb0eb..da3e87ee4 100644 --- a/src/cpu/kvm/base.cc +++ b/src/cpu/kvm/base.cc @@ -630,7 +630,7 @@ BaseKvmCPU::tick() case RunningServiceCompletion: case Running: { - const uint64_t nextInstEvent(nextInstEventCount(0)); + const uint64_t nextInstEvent(tc->nextInstEventCount()); // Enter into KVM and complete pending IO instructions if we // have an instruction event pending. const Tick ticksToExecute( @@ -686,7 +686,7 @@ BaseKvmCPU::tick() // Service any pending instruction events. The vCPU should // have exited in time for the event using the instruction // counter configured by setupInstStop(). - serviceInstCountEvents(0, ctrInsts); + tc->serviceInstCountEvents(ctrInsts); if (tryDrain()) _status = Idle; @@ -1346,7 +1346,7 @@ BaseKvmCPU::ioctlRun() void BaseKvmCPU::setupInstStop() { - Tick next = nextInstEventCount(0); + Tick next = tc->nextInstEventCount(); if (next == MaxTick) { setupInstCounter(0); } else { diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc index 9317f61f4..0e83db3cb 100644 --- a/src/cpu/minor/execute.cc +++ b/src/cpu/minor/execute.cc @@ -870,7 +870,8 @@ Execute::doInstCommitAccounting(MinorDynInstPtr inst) cpu.system->totalNumInsts++; /* Act on events related to instruction counts */ - cpu.serviceInstCountEvents(inst->id.threadId, thread->numInst); + cpu.getContext(inst->id.threadId)-> + serviceInstCountEvents(thread->numInst); } thread->numOp++; thread->numOps++; diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index e49d4997e..bb3f0c301 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -1521,7 +1521,7 @@ FullO3CPU::instDone(ThreadID tid, const DynInstPtr &inst) system->totalNumInsts++; // Check for instruction-count-based events. - serviceInstCountEvents(tid, thread[tid]->numInst); + thread[tid]->tc->serviceInstCountEvents(thread[tid]->numInst); } thread[tid]->numOp++; thread[tid]->numOps++; diff --git a/src/cpu/o3/probe/elastic_trace.cc b/src/cpu/o3/probe/elastic_trace.cc index 586688600..3e98e5a19 100644 --- a/src/cpu/o3/probe/elastic_trace.cc +++ b/src/cpu/o3/probe/elastic_trace.cc @@ -109,8 +109,8 @@ ElasticTrace::regProbeListeners() } else { // Schedule an event to register all elastic trace probes when // specified no. of instructions are committed. - cpu->scheduleInstCountEvent( - 0, ®EtraceListenersEvent, startTraceInst); + cpu->getContext(0)->scheduleInstCountEvent( + ®EtraceListenersEvent, startTraceInst); } } diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc index fc07fedc0..f45165b9e 100644 --- a/src/cpu/simple/base.cc +++ b/src/cpu/simple/base.cc @@ -500,7 +500,7 @@ BaseSimpleCPU::preExecute() t_info.setMemAccPredicate(true); // check for instruction-count-based events - serviceInstCountEvents(curThread, t_info.numInst); + thread->getTC()->serviceInstCountEvents(t_info.numInst); // decode the instruction inst = gtoh(inst);