From: Jacob Lifshay Date: Thu, 11 Mar 2021 23:54:22 +0000 (-0800) Subject: working on adding code to generate the c++ header from the libre-soc spec csv files X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a2ea86cba0ede0ec6620ec7aaa3916f8024aa986;p=simplev-cpp.git working on adding code to generate the c++ header from the libre-soc spec csv files --- diff --git a/generate_headers.py b/generate_headers.py new file mode 100755 index 0000000..75126c6 --- /dev/null +++ b/generate_headers.py @@ -0,0 +1,119 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: LGPL-2.1-or-later +# See Notices.txt for copyright information + +from soc.decoder.isa.caller import (SVP64PrefixFields, SV64P_MAJOR_SIZE, + SV64P_PID_SIZE, SVP64RMFields, + SVP64RM_EXTRA2_SPEC_SIZE, + SVP64RM_EXTRA3_SPEC_SIZE, + SVP64RM_MODE_SIZE, SVP64RM_SMASK_SIZE, + SVP64RM_MMODE_SIZE, SVP64RM_MASK_SIZE, + SVP64RM_SUBVL_SIZE, SVP64RM_EWSRC_SIZE, + SVP64RM_ELWIDTH_SIZE) +from soc.decoder.pseudo.pagereader import ISA +from soc.decoder.power_svp64 import SVP64RM, get_regtype, decode_extra +from soc.decoder.power_fields import DecodeFields + + +class RangeField: + def __init__(self): + self.start = None + self.last = None + # TODO: finish + + +isa = ISA() +svp64rm = SVP64RM() +decode_fields = DecodeFields() +decode_fields.create_specs() + +decode_fields.forms +PRIMARY_OPCODE_SHIFT = 32 - 6 +# unofficial value. see https://libre-soc.org/openpower/sv/setvl/ +# FIXME: incorrect extended opcode value +SETVL_OPCODE = (19 << PRIMARY_OPCODE_SHIFT) | (0 << 1) +SETVL_IMMEDIATE_SHIFT = 32 - 7 - 16 +REG_FIELD_WIDTH = 5 +XL_FORM_RT_SHIFT = 32 - REG_FIELD_WIDTH - 6 +XL_FORM_RA_SHIFT = 32 - REG_FIELD_WIDTH - 11 + + +def is_power_of_2(i): + assert isinstance(i, int) + return (i & (i - 1)) == 0 and i != 0 + + +with open("include/simplev_cpp_generated.h", mode="w", encoding="utf-8") as o: + o.write("""// SPDX-License-Identifier: LGPL-2.1-or-later +// See Notices.txt for copyright information +#pragma once +#include +#include +#include + +#ifdef __clang__ +#define SIMPLEV_USE_NONPOT_VECTORS +#endif + +// #undef SIMPLEV_USE_BIGGER_THAN_8_BYTE_VECTORS + +namespace sv +{ +template +struct VecTypeStruct; + +template +using VecType = typename VecTypeStruct::Type; + +#define SIMPLEV_MAKE_VEC_TYPE(size) \\ + template \\ + struct VecTypeStruct> \\ + final \\ + { \\ + typedef ElementType Type __attribute__((vector_size(size))); \\ + }; + +#ifdef SIMPLEV_USE_NONPOT_VECTORS +#define SIMPLEV_MAKE_VEC_TYPE_NONPOT(size) SIMPLEV_MAKE_VEC_TYPE(size) +#else +#define SIMPLEV_MAKE_VEC_TYPE_NONPOT(size) +#endif + +""") + for i in range(1, 128 + 1): + if is_power_of_2(i): + o.write(f"SIMPLEV_MAKE_VEC_TYPE({i})\n") + else: + o.write(f"SIMPLEV_MAKE_VEC_TYPE_NONPOT({i})\n") + if i == 8: + o.write("#ifdef SIMPLEV_USE_BIGGER_THAN_8_BYTE_VECTORS\n") + o.write(f"""#endif // SIMPLEV_USE_BIGGER_THAN_8_BYTE_VECTORS + +template +struct VL final +{{ + static_assert(MAX_VL > 0 && MAX_VL <= 64); + std::size_t value; +}}; + +template +inline __attribute__((always_inline)) VL setvl(std::size_t vl) +{{ + VL retval; + asm volatile( + "# setvl %[retval], %[vl], MVL=%[max_vl]\\n\\t" + ".long %[instr] | (%[retval] << %[rt_shift]) | (%[vl] << %[ra_shift])" + : [retval] "=b"(retval.value) + : [vl] "b"(vl), [max_vl] "n"(MAX_VL), [instr] "n"({FIXME@@@FINISH})); + return retval; +}} +}} // namespace sv + +#undef SIMPLEV_MAKE_VEC_TYPE +#undef SIMPLEV_MAKE_VEC_TYPE_NONPOT +#undef SIMPLEV_USE_NONPOT_VECTORS +#undef SIMPLEV_USE_BIGGER_THAN_8_BYTE_VECTORS +""")