From: Segher Boessenkool Date: Mon, 1 Jul 2019 18:40:40 +0000 (+0200) Subject: rs6000.md (extenddf2_fprs): Make this a parameterized name. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a3185de66be126c32508f7da8944585d9272d846;p=gcc.git rs6000.md (extenddf2_fprs): Make this a parameterized name. @extenddf2_{fprs,vsx} * config/rs6000/rs6000.md (extenddf2_fprs): Make this a parameterized name. (extenddf2_vsx): Make this a parameterized name. (extenddf2): Use those names. Simplify. From-SVN: r272901 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 63af1c86f89..bd4c8c5de09 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2019-07-01 Segher Boessenkool + + * config/rs6000/rs6000.md (extenddf2_fprs): Make this a + parameterized name. + (extenddf2_vsx): Make this a parameterized name. + (extenddf2): Use those names. Simplify. + 2019-07-01 Segher Boessenkool * config/rs6000/rs6000.md (eh_set_lr_): Make this a parameterized diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 6470d95f191..21ef8d7a3ad 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -7789,31 +7789,20 @@ if (FLOAT128_IEEE_P (mode)) rs6000_expand_float128_convert (operands[0], operands[1], false); else if (TARGET_VSX) - { - if (mode == TFmode) - emit_insn (gen_extenddftf2_vsx (operands[0], operands[1])); - else if (mode == IFmode) - emit_insn (gen_extenddfif2_vsx (operands[0], operands[1])); - else - gcc_unreachable (); - } - else + emit_insn (gen_extenddf2_vsx (mode, operands[0], operands[1])); + else { rtx zero = gen_reg_rtx (DFmode); rs6000_emit_move (zero, CONST0_RTX (DFmode), DFmode); - if (mode == TFmode) - emit_insn (gen_extenddftf2_fprs (operands[0], operands[1], zero)); - else if (mode == IFmode) - emit_insn (gen_extenddfif2_fprs (operands[0], operands[1], zero)); - else - gcc_unreachable (); + emit_insn (gen_extenddf2_fprs (mode, + operands[0], operands[1], zero)); } DONE; }) ;; Allow memory operands for the source to be created by the combiner. -(define_insn_and_split "extenddf2_fprs" +(define_insn_and_split "@extenddf2_fprs" [(set (match_operand:IBM128 0 "gpc_reg_operand" "=d,d,&d") (float_extend:IBM128 (match_operand:DF 1 "nonimmediate_operand" "d,m,d"))) @@ -7832,7 +7821,7 @@ operands[4] = simplify_gen_subreg (DFmode, operands[0], mode, lo_word); }) -(define_insn_and_split "extenddf2_vsx" +(define_insn_and_split "@extenddf2_vsx" [(set (match_operand:IBM128 0 "gpc_reg_operand" "=d,d") (float_extend:IBM128 (match_operand:DF 1 "nonimmediate_operand" "wa,m")))]