From: Steve Ellcey Date: Mon, 27 Jan 2014 22:38:42 +0000 (+0000) Subject: mips-common.c (TARGET_DEFAULT_TARGET_FLAGS): Remove TARGET_FP_EXCEPTIONS_DEFAULT... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a33fc7fe6c3f8c329c682877b1a7937a45d993dd;p=gcc.git mips-common.c (TARGET_DEFAULT_TARGET_FLAGS): Remove TARGET_FP_EXCEPTIONS_DEFAULT and MASK_FUSED_MADD. 2014-01-27 Steve Ellcey * common/config/mips/mips-common.c (TARGET_DEFAULT_TARGET_FLAGS): Remove TARGET_FP_EXCEPTIONS_DEFAULT and MASK_FUSED_MADD. * config/mips/mips.c (mips_option_override): Change setting of TARGET_DSP. * config/mips/mips.h (TARGET_FP_EXCEPTIONS_DEFAULT): Remove. * config/mips/mips.opt (DSP, DSPR2, FP_EXCEPTIONS, FUSED_MADD, MIPS3D) Change from Mask to Var. From-SVN: r207154 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 69f8ba112be..77b462f7281 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2014-01-27 Steve Ellcey + + * common/config/mips/mips-common.c (TARGET_DEFAULT_TARGET_FLAGS): + Remove TARGET_FP_EXCEPTIONS_DEFAULT and MASK_FUSED_MADD. + * config/mips/mips.c (mips_option_override): Change setting + of TARGET_DSP. + * config/mips/mips.h (TARGET_FP_EXCEPTIONS_DEFAULT): Remove. + * config/mips/mips.opt (DSP, DSPR2, FP_EXCEPTIONS, FUSED_MADD, + MIPS3D) Change from Mask to Var. + 2014-01-27 Jeff Law * ipa-inline.c (inline_small_functions): Fix typo. diff --git a/gcc/common/config/mips/mips-common.c b/gcc/common/config/mips/mips-common.c index cece4ae3b65..7dd8d2d56a8 100644 --- a/gcc/common/config/mips/mips-common.c +++ b/gcc/common/config/mips/mips-common.c @@ -62,9 +62,7 @@ static const struct default_options mips_option_optimization_table[] = (TARGET_DEFAULT \ | TARGET_CPU_DEFAULT \ | TARGET_ENDIAN_DEFAULT \ - | TARGET_FP_EXCEPTIONS_DEFAULT \ - | MASK_CHECK_ZERO_DIV \ - | MASK_FUSED_MADD) + | MASK_CHECK_ZERO_DIV) #undef TARGET_HANDLE_OPTION #define TARGET_HANDLE_OPTION mips_handle_option diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 5bad0f8b122..59c0b26d16e 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -17084,9 +17084,9 @@ mips_option_override (void) mips_r10k_cache_barrier = R10K_CACHE_BARRIER_NONE; } - /* If TARGET_DSPR2, enable MASK_DSP. */ + /* If TARGET_DSPR2, enable TARGET_DSP. */ if (TARGET_DSPR2) - target_flags |= MASK_DSP; + TARGET_DSP = true; /* .eh_frame addresses should be the same width as a C pointer. Most MIPS ABIs support only one pointer size, so the assembler diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index bc9d301291c..150cf0c3136 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -588,10 +588,6 @@ struct mips_cpu_info { #define TARGET_ENDIAN_DEFAULT MASK_BIG_ENDIAN #endif -#ifndef TARGET_FP_EXCEPTIONS_DEFAULT -#define TARGET_FP_EXCEPTIONS_DEFAULT MASK_FP_EXCEPTIONS -#endif - #ifdef IN_LIBGCC2 #undef TARGET_64BIT /* Make this compile time constant for libgcc2 */ diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt index 877ec594f56..be551a7a452 100644 --- a/gcc/config/mips/mips.opt +++ b/gcc/config/mips/mips.opt @@ -116,11 +116,11 @@ Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT) Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations mdsp -Target Report Mask(DSP) +Target Report Var(TARGET_DSP) Use MIPS-DSP instructions mdspr2 -Target Report Mask(DSPR2) +Target Report Var(TARGET_DSPR2) Use MIPS-DSP REV 2 instructions mdebug @@ -190,7 +190,7 @@ Target Report Var(TARGET_4300_MUL_FIX) Work around an early 4300 hardware bug mfp-exceptions -Target Report Mask(FP_EXCEPTIONS) +Target Report Var(TARGET_FP_EXCEPTIONS) Init(1) FP exceptions are enabled mfp32 @@ -206,7 +206,7 @@ Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC) -mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines mfused-madd -Target Report Mask(FUSED_MADD) +Target Report Var(TARGET_FUSED_MADD) Init(1) Generate floating-point multiply-add instructions mabs= @@ -264,7 +264,7 @@ Target Report RejectNegative Mask(MIPS16) Generate MIPS16 code mips3d -Target Report RejectNegative Mask(MIPS3D) +Target Report RejectNegative Var(TARGET_MIPS3D) Use MIPS-3D instructions mllsc @@ -324,7 +324,7 @@ Target Report RejectNegative InverseMask(MIPS16) Generate normal-mode code mno-mips3d -Target Report RejectNegative InverseMask(MIPS3D) +Target Report RejectNegative Var(TARGET_MIPS3D, 0) Do not use MIPS-3D instructions mpaired-single