From: Jakub Cebulski <jcebulski@internships.antmicro.com>
Date: Thu, 5 Mar 2020 16:10:50 +0000 (+0100)
Subject: spi_flash: fix building without bitbang
X-Git-Tag: 24jan2021_ls180~350^2~1
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a344e20b5ee29e8bb82815b88775e90ae6adeba7;p=litex.git

spi_flash: fix building without bitbang
---

diff --git a/litex/soc/cores/spi_flash.py b/litex/soc/cores/spi_flash.py
index c3066b38..39093bad 100644
--- a/litex/soc/cores/spi_flash.py
+++ b/litex/soc/cores/spi_flash.py
@@ -121,11 +121,16 @@ class SpiFlashDualQuad(SpiFlashCommon, AutoCSR):
         addr_width = 24
 
         dq = TSTriple(spi_width)
-        # Keep DQ2,DQ3 as outputs during bitbang, this ensures they activate ~WP or ~HOLD functions
+
         self.specials.dq0 = Tristate(pads.dq[0], o=dq.o[0], i=dq.i[0], oe=dq.oe)
         self.specials.dq1 = Tristate(pads.dq[1], o=dq.o[1], i=dq.i[1], oe=dq.oe)
-        self.specials.dq2 = Tristate(pads.dq[2], o=dq.o[2], i=dq.i[2], oe=(dq.oe | self.bitbang_en.storage))
-        self.specials.dq3 = Tristate(pads.dq[3], o=dq.o[3], i=dq.i[3], oe=(dq.oe | self.bitbang_en.storage))
+        if with_bitbang:
+            # Keep DQ2,DQ3 as outputs during bitbang, this ensures they activate ~WP or ~HOLD functions            
+            self.specials.dq2 = Tristate(pads.dq[2], o=dq.o[2], i=dq.i[2], oe=(dq.oe | self.bitbang_en.storage))
+            self.specials.dq3 = Tristate(pads.dq[3], o=dq.o[3], i=dq.i[3], oe=(dq.oe | self.bitbang_en.storage))
+        else:
+            self.specials.dq2 = Tristate(pads.dq[2], o=dq.o[2], i=dq.i[2], oe=dq.oe)
+            self.specials.dq3 = Tristate(pads.dq[3], o=dq.o[3], i=dq.i[3], oe=dq.oe)
 
         sr = Signal(max(cmd_width, addr_width, wbone_width))
         if endianness == "big":