From: Thiemo Seufer Date: Mon, 6 Nov 2006 14:28:21 +0000 (+0000) Subject: * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a360e743fba30ffcd20ca3878b16bc28b5634629;p=binutils-gdb.git * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases. 34k always has DSP ASE. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index cb43b8463c8..eccd265f136 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2006-11-06 Thiemo Seufer + + * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases. + 34k always has DSP ASE. + 2006-11-03 Thiemo Seufer * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index e9657c1bfe6..d3ed8186f38 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -14580,19 +14580,20 @@ static const struct mips_cpu_info mips_cpu_info_table[] = { "4ksd", MIPS_CPU_ASE_SMARTMIPS, ISA_MIPS32R2, CPU_MIPS32R2 }, { "m4k", 0, ISA_MIPS32R2, CPU_MIPS32R2 }, { "m4kp", 0, ISA_MIPS32R2, CPU_MIPS32R2 }, - { "24k", 0, ISA_MIPS32R2, CPU_MIPS32R2 }, { "24kc", 0, ISA_MIPS32R2, CPU_MIPS32R2 }, { "24kf", 0, ISA_MIPS32R2, CPU_MIPS32R2 }, { "24kx", 0, ISA_MIPS32R2, CPU_MIPS32R2 }, /* 24ke is a 24k with DSP ASE, other ASEs are optional. */ - { "24ke", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 }, { "24kec", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 }, { "24kef", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 }, { "24kex", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 }, - /* 34k is a 24k with MT ASE, other ASEs are optional. */ - { "34kc", MIPS_CPU_ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, - { "34kf", MIPS_CPU_ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, - { "34kx", MIPS_CPU_ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, + /* 34k is a 24k with DSP and MT ASE, other ASEs are optional. */ + { "34kc", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT, + ISA_MIPS32R2, CPU_MIPS32R2 }, + { "34kf", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT, + ISA_MIPS32R2, CPU_MIPS32R2 }, + { "34kx", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT, + ISA_MIPS32R2, CPU_MIPS32R2 }, /* MIPS 64 */ { "5kc", 0, ISA_MIPS64, CPU_MIPS64 },