From: Jacob Lifshay <programmerjake@gmail.com>
Date: Fri, 17 May 2024 08:15:12 +0000 (-0700)
Subject: test DecodeReducingPolynomial exhaustively for small XLEN
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a3c473b0521038e02f67a899fcaf1795ce3ff295;p=nmigen-gf.git

test DecodeReducingPolynomial exhaustively for small XLEN
---

diff --git a/src/nmigen_gf/hdl/test/test_decode_reducing_polynomial.py b/src/nmigen_gf/hdl/test/test_decode_reducing_polynomial.py
index 47f4ce2..9dd6a04 100644
--- a/src/nmigen_gf/hdl/test/test_decode_reducing_polynomial.py
+++ b/src/nmigen_gf/hdl/test/test_decode_reducing_polynomial.py
@@ -21,8 +21,8 @@ from nmigen_gf.reference.state import ST
 
 
 class TestDecodeReducingPolynomial(FHDLTestCase):
-    def tst(self, XLEN):
-        # type: (int) -> None
+    def tst(self, XLEN, full):
+        # type: (int, bool) -> None
         dut = DecodeReducingPolynomial(XLEN)
         self.assertEqual(dut.XLEN, XLEN)
         self.assertEqual(dut.REDPOLY.width, XLEN)
@@ -41,27 +41,31 @@ class TestDecodeReducingPolynomial(FHDLTestCase):
                     self.assertEqual(expected, reducing_polynomial)
 
         def process():
-            for i in range(100):
-                v = hash_256("dec_rpoly XLEN %i %i REDPOLY" % (XLEN, i))
-                shift = hash_256("dec_rpoly XLEN %i %i shift" % (XLEN, i))
-                v >>= shift % XLEN
-                REDPOLY = Const.normalize(v, unsigned(XLEN))
-                yield from case(REDPOLY)
+            if full:
+                for REDPOLY in range(2 ** XLEN):
+                    yield from case(REDPOLY)
+            else:
+                for i in range(100):
+                    v = hash_256("dec_rpoly XLEN %i %i REDPOLY" % (XLEN, i))
+                    shift = hash_256("dec_rpoly XLEN %i %i shift" % (XLEN, i))
+                    v >>= shift % XLEN
+                    REDPOLY = Const.normalize(v, unsigned(XLEN))
+                    yield from case(REDPOLY)
         with do_sim(self, dut, [dut.REDPOLY, dut.reducing_polynomial]) as sim:
             sim.add_process(process)
             sim.run()
 
     def test_8(self):
-        self.tst(8)
+        self.tst(8, True)
 
     def test_16(self):
-        self.tst(16)
+        self.tst(16, True)
 
     def test_32(self):
-        self.tst(32)
+        self.tst(32, False)
 
     def test_64(self):
-        self.tst(64)
+        self.tst(64, False)
 
 
 if __name__ == "__main__":