From: Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Date: Wed, 2 Dec 2015 07:53:03 +0000 (+0000)
Subject: S/390: Fix vrepi constraint letter.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a4a443cee2ea9c2db55e2802d46a4d5b6cbe1784;p=gcc.git

S/390: Fix vrepi constraint letter.

gcc/ChangeLog:

2015-12-02  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/vector.md ("*vec_splats<mode>"): Fix constraint
	latter I->K.

gcc/testsuite/ChangeLog:

2015-12-02  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* gcc.target/s390/zvector/vec-splat-1.c: New test.

From-SVN: r231153
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2976dfc8c80..8b6fdbc9eb4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2015-12-02  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* config/s390/vector.md ("*vec_splats<mode>"): Fix constraint
+	latter I->K.
+
 2015-12-02  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 
 	* config/s390/s390.md ("bswap<mode>2"): Add support for strv and
diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index 16276e0de36..d8b9b07a24a 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -370,11 +370,11 @@
 
 (define_insn "*vec_splats<mode>"
   [(set (match_operand:V_HW                          0 "register_operand" "=v,v,v,v")
-	(vec_duplicate:V_HW (match_operand:<non_vec> 1 "general_operand"  "QR,I,v,d")))]
+	(vec_duplicate:V_HW (match_operand:<non_vec> 1 "general_operand"  "QR,K,v,d")))]
   "TARGET_VX"
   "@
    vlrep<bhfgq>\t%v0,%1
-   vrepi<bhfgq>\t%v0,%1
+   vrepi<bhfgq>\t%v0,%h1
    vrep<bhfgq>\t%v0,%v1,0
    #"
   [(set_attr "op_type" "VRX,VRI,VRI,*")])
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 91186824425..79e459603e2 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2015-12-02  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* gcc.target/s390/zvector/vec-splat-1.c: New test.
+
 2015-12-02  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 
 	* gcc.target/s390/bswap-1.c (foo64c, foo32a, foo32c): New functions.
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-splat-1.c b/gcc/testsuite/gcc.target/s390/zvector/vec-splat-1.c
new file mode 100644
index 00000000000..bab2e2d4028
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-splat-1.c
@@ -0,0 +1,42 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -march=z13 -mzvector" } */
+
+#include <vecintrin.h>
+
+vector signed char v16qi;
+vector short       v8hi;
+vector int         v4si;
+vector long long   v2di;
+
+vector unsigned char      uv16qi;
+vector unsigned short     uv8hi;
+vector unsigned int       uv4si;
+vector unsigned long long uv2di;
+
+int
+foo ()
+{
+  v16qi  = vec_splats ((signed char)0x77);
+  uv16qi = vec_splats ((unsigned char)0x77);
+
+  v8hi  = vec_splats ((short int)0x7f0f);
+  uv8hi = vec_splats ((unsigned short int)0x7f0f);
+
+  v4si  = vec_splats ((int)0x7f0f);
+  uv4si = vec_splats ((unsigned int)0x7f0f);
+
+  v2di  = vec_splats ((long long)0x7f0f);
+  uv2di = vec_splats ((unsigned long long)0x7f0f);
+}
+
+/* { dg-final { scan-assembler-times "vrepib\t%v.*,119" 1 } } */
+/* { dg-final { scan-assembler-times "vrepib\t%v.*,119" 1 } } */
+
+/* { dg-final { scan-assembler-times "vrepih\t%v.*,32527" 1 } } */
+/* { dg-final { scan-assembler-times "vrepih\t%v.*,32527" 1 } } */
+
+/* { dg-final { scan-assembler-times "vrepif\t%v.*,32527" 1 } } */
+/* { dg-final { scan-assembler-times "vrepif\t%v.*,32527" 1 } } */
+
+/* { dg-final { scan-assembler-times "vrepig\t%v.*,32527" 1 } } */
+/* { dg-final { scan-assembler-times "vrepig\t%v.*,32527" 1 } } */