From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 30 Jul 2018 07:53:27 +0000 (+0100)
Subject: correct flexbus connections
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a4ad85cfd32094af5d04edb67628cbbf01956f7d;p=pinmux.git

correct flexbus connections
---

diff --git a/src/bsv/peripheral_gen/base.py b/src/bsv/peripheral_gen/base.py
index 2fdb7d2..51902fc 100644
--- a/src/bsv/peripheral_gen/base.py
+++ b/src/bsv/peripheral_gen/base.py
@@ -200,6 +200,7 @@ else"""
         if stype is None:
             stype = pname
         ret = []
+        ret.append("//%s %s %s %s %s" % (name, ptyp, typ, pname, stype))
         if ptyp == 'fast':
             sname = self.get_iname(count)
             ps = "slow_peripherals.%s" % sname
diff --git a/src/bsv/peripheral_gen/flexbus.py b/src/bsv/peripheral_gen/flexbus.py
index d406a46..726f5be 100644
--- a/src/bsv/peripheral_gen/flexbus.py
+++ b/src/bsv/peripheral_gen/flexbus.py
@@ -34,6 +34,7 @@ class flexbus(PBase):
     def pinname_out(self, pname):
         return {'ale': 'flexbus_side.m_ALE',
                 'oe': 'flexbus_side.m_OEn',
+                'tbst': 'flexbus_side.m_TBSTn',
                 'rw': 'flexbus_side.m_R_Wn',
                 }.get(pname, '')
 
@@ -42,7 +43,6 @@ class flexbus(PBase):
         for pname, sz, ptype in [
             ('cs', 6, 'out'),
             ('bwe', 4, 'out'),
-            ('tbst', 2, 'out'),
             ('tsiz', 2, 'out'),
             ('ad_out', 32, 'out'),
             ('ad_in', 32, 'in'),
@@ -59,7 +59,6 @@ class flexbus(PBase):
         for pname, stype, ptype in [
             ('cs', 'm_FBCSn', 'out'),
             ('bwe', 'm_BWEn', 'out'),
-            ('tbst', 'm_TBSTn', 'out'),
             ('tsiz', 'm_TSIZ', 'out'),
             ('ad_out', 'm_AD', 'out'),
             ('ad_in', 'm_din', 'in'),