From: Sergei Trofimovich Date: Mon, 14 Feb 2022 17:12:41 +0000 (+0000) Subject: microblaze: fix fsqrt collicion to build on glibc-2.35 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a532eb7277ff64fb073e209d418b0a97f686c0e3;p=binutils-gdb.git microblaze: fix fsqrt collicion to build on glibc-2.35 * microblaze-opcm.h: Renamed 'fsqrt' to 'microblaze_fsqrt'. * microblaze-opc.h: Follow 'fsqrt' rename. --- diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index a074429f174..05039f6ef3a 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2022-02-14 Sergei Trofimovich + + * microblaze-opcm.h: Renamed 'fsqrt' to 'microblaze_fsqrt'. + * microblaze-opc.h: Follow 'fsqrt' rename. + 2022-01-24 Nick Clifton * po/ro.po: Updated Romanian translation. diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h index 81bf2e19548..ffb0f08c692 100644 --- a/opcodes/microblaze-opc.h +++ b/opcodes/microblaze-opc.h @@ -268,7 +268,7 @@ const struct op_code_struct {"fcmp.un", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000200, OPCODE_MASK_H4, fcmp_un, arithmetic_inst }, {"flt", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000280, OPCODE_MASK_H4, flt, arithmetic_inst }, {"fint", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000300, OPCODE_MASK_H4, fint, arithmetic_inst }, - {"fsqrt", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000380, OPCODE_MASK_H4, fsqrt, arithmetic_inst }, + {"fsqrt", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000380, OPCODE_MASK_H4, microblaze_fsqrt, arithmetic_inst }, {"tget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C001000, OPCODE_MASK_H32, tget, anyware_inst }, {"tcget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C003000, OPCODE_MASK_H32, tcget, anyware_inst }, {"tnget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C005000, OPCODE_MASK_H32, tnget, anyware_inst }, diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h index 1b0955c4e0f..8e293465fec 100644 --- a/opcodes/microblaze-opcm.h +++ b/opcodes/microblaze-opcm.h @@ -42,7 +42,8 @@ enum microblaze_instr shr, sw, swr, swx, lbui, lhui, lwi, sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, - fint, fsqrt, + /* 'fsqrt' is a glibc:math.h symbol. */ + fint, microblaze_fsqrt, tget, tcget, tnget, tncget, tput, tcput, tnput, tncput, eget, ecget, neget, necget, eput, ecput, neput, necput, teget, tecget, tneget, tnecget, teput, tecput, tneput, tnecput,