From: Daniel R. Carvalho <odanrc@yahoo.com.br>
Date: Sat, 7 Sep 2019 09:14:57 +0000 (+0200)
Subject: mem-ruby: Remove shiftLowOrderBits
X-Git-Tag: v19.0.0.0~505
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a5408244d1fb6dcad6234b601b5aa8d439fd49cd;p=gem5.git

mem-ruby: Remove shiftLowOrderBits

There is no need to encapsulate a shift operation.

Change-Id: Ie711d8d4975d1d9dde656cc2284a048410cfdadb
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21083
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---

diff --git a/src/mem/ruby/common/Address.cc b/src/mem/ruby/common/Address.cc
index af8ddb437..1afefc236 100644
--- a/src/mem/ruby/common/Address.cc
+++ b/src/mem/ruby/common/Address.cc
@@ -58,12 +58,6 @@ maskLowOrderBits(Addr addr, unsigned int number)
   return (addr & mask);
 }
 
-Addr
-shiftLowOrderBits(Addr addr, unsigned int number)
-{
-    return (addr >> number);
-}
-
 Addr
 getOffset(Addr addr)
 {
diff --git a/src/mem/ruby/common/Address.hh b/src/mem/ruby/common/Address.hh
index 6aed96a1b..31f52e540 100644
--- a/src/mem/ruby/common/Address.hh
+++ b/src/mem/ruby/common/Address.hh
@@ -40,7 +40,6 @@ const uint32_t ADDRESS_WIDTH = 64; // address width in bytes
 // selects bits inclusive
 Addr bitSelect(Addr addr, unsigned int small, unsigned int big);
 Addr maskLowOrderBits(Addr addr, unsigned int number);
-Addr shiftLowOrderBits(Addr addr, unsigned int number);
 Addr getOffset(Addr addr);
 Addr makeLineAddress(Addr addr);
 Addr makeNextStrideAddress(Addr addr, int stride);