From: Eric Botcazou <ebotcazou@adacore.com>
Date: Fri, 4 Nov 2011 17:37:03 +0000 (+0000)
Subject: re PR target/50979 (architecture mismatch: "mul32" not enabled for "smul" or "umul")
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a5c037e263621253d04132f3a7a42f0b1683e004;p=gcc.git

re PR target/50979 (architecture mismatch: "mul32" not enabled for "smul" or "umul")

	PR target/50979
	* config/sparc/sparc.h (ASM_CPU_SPEC): Pass -Av8 if -mcpu=v8.

From-SVN: r180966
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2c2c1544858..35ad340dd46 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2011-11-04  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR target/50979
+	* config/sparc/sparc.h (ASM_CPU_SPEC): Pass -Av8 if -mcpu=v8.
+
 2011-11-04  Jiangning Liu  <jiangning.liu@arm.com>
 
 	PR rtl-optimization/38644
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 65b45271890..e8707f50577 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -328,6 +328,7 @@ extern enum cmodel sparc_cmodel;
 %{mcpu=sparclite:-Asparclite} \
 %{mcpu=sparclite86x:-Asparclite} \
 %{mcpu=f930:-Asparclite} %{mcpu=f934:-Asparclite} \
+%{mcpu=v8:-Av8} \
 %{mv8plus:-Av8plus} \
 %{mcpu=v9:-Av9} \
 %{mcpu=ultrasparc:%{!mv8plus:-Av9a}} \